PEDL9090-02
¡ Semiconductor
ML9090-01,-02
FUNCTIONAL DESCRIPTIONS
Pin Functional Descriptions
No.of
pins
1
Function
Symbol
CS
Pin name Type
Description
Chip Select
Clock Pulse
I
I
Chip select signal input pin
Shift clock signal input pin. This pin is
connected to an internal Schmitt circuit
Serial data signal I/O pin
CP
1
CPU interface
DI/O
KREQ
OSC1
OSC2
Data I/O
Key Request
OSC1
I/O
O
I
1
1
1
1
Key request signal output pin
Oscillation
Connect external resistors.
OSC2
O
Initial settings can be established by pulling
the reset input to a "L" level. This pin is
connected to an internal Schmitt circuit.
Input pin for selecting the voltage doubler
or voltage tripler.
RESET
RESET
I
1
Control signals
Doubler Tripler
Select
DT
I
I
1
1
Test input pin. This pin is connected to the
VSS pin.
TEST
TEST
C0 to C4
R0 to R4
PA0
Column Input
Row Output
Port Output
Port Output
I
5
5
Input pins that detect status of key switches
Key switch scan signal pins
Port A output
Key scan signals
Port outputs
O
O
O
O
1
PB0 to PB7
8
Port B outputs (for ML9090-01)
Outputs for LCD segment drivers
Outputs for LCD common drivers
(for ML9090-01)
SEG1 to SEG80 Seg Output
80
COM1 to
Com Output
COM10
O
O
10
18
LCD driver outputs
COM1 to
Com Output
COM18
Outputs for LCD common drivers
(for ML9090-02)
VDD
VSS
VDD
VSS
—
—
1
1
Logic power supply pin
GND pin
Voltage multiplier reference voltage power
supply pin
VIN
VIN
—
—
1
2
Power supply
Capacitor connection pins for voltage
multiplier
VC1, VC2
VC1, VC2
VS1
VS2
VS1
VS2
—
—
—
1
1
3
Voltage doubler output pin
Voltage tripler output pin
LCD bias pins
V2, V3A, V3B
V2, V3A, V3B
12/38
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