PEDL9040A-03
¡ Semiconductor
ML9040A-Axx/-Bxx
Instruction Code
The instruction code is defined as the signal through which the ML9040A-Axx/-Bxx is
accessed by the CPU.
The ML9040A-Axx/-Bxx begins operation upon receipt of the instruction code input.
AstheinternalprocessingoperationofML9040A-Axx/-Bxxstartsinatimingthatdoesnot
affect the LCD display, the busy status continues for longer than the CPU cycle time.
Under the busy status (when the busy flag is set to "H"), the ML9040A-Axx/-Bxx does not
execute any instructions other than the busy flag read.
Therefore, the CPU has to verify that the busy flag is set to "L" prior to the input of the
instruction code.
(1) Display clear:
R/W RS DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Instruction code
L
L
L
L
L
L
L
L
L
H
When this instruction is executed, the LCD display is cleared.
I/D in the entry mode setting is set to "H" (increment). SH does not change.
When the cursor and blink are in display, the blinking position moves to the left end of the
LCD (the left end of the first line in the 2-line display mode).
(Note) All DD RAM data goes to "20" (hex.), while the address counter (ADC) goes to "00"
(hex.). The execution time is 1.53 ms (max.), when the OSC oscillation frequency
is 270 kHz.
(2) Cursor home
R/W RS DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Instruction code
L
L
L
L
L
L
L
L
H
X
X : Don't Care
When this instruction is executed while the cursor and blink are being displayed, the
blinking position moves to the left end of the LCD (to the left end of the first line in the 2-
line display mode).
While the display is in shift, the display returns to its original position before shifting.
(Note) The address counter (ADC) goes to "00" (hex.). The execution time is 1.53 ms
(max.), when the OSC oscillation frequency is 270 kHz.
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