PEDL9040A-03
¡ Semiconductor
ML9040A-Axx/-Bxx
• Timing for output to the CPU
(VDD = 4.5 to 5.5V, Ta = –20 to +75°C)
Parameter
R/W and RS setup time
E "H" pulse width
Symbol
Min.
140
280
10
Typ.
—
Max.
—
Unit
ns
tB
tW
tA
tr
—
—
ns
R/W and RS hold time
E rise time
—
—
ns
—
—
100
100
—
ns
E fall time
tf
—
—
ns
E "L" pulse width
tL
tC
tD
tO
280
667
—
—
ns
E cycle time
—
—
ns
DB0 to DB7 data output delay time
DB0 to DB7 data output hold time
—
220
—
ns
20
—
ns
VIH2
VIH2
R/W
RS
VIH1
VIL1
VIH1
VIL1
tB
tW
tA
tL
VIH1
VIH1
tf
VIL1
VIL1
tO
VIL1
E
tr
tD
VOH1
VOH1
VOL1
Output data
tC
DB0-DB7
VOL1
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