PEDL9044-03
1
Semiconductor
ML9044-xxA/xxB
ML9044-xxB CVWA PAD CONFIGURATION
Pad Layout
Chip Size:
10.62 × 2.55 mm
Chip Thickness: 625±20 µm
Bump Size (1):
Bump Size (2):
72 × 72 µm
(PAD No. 1-55)
54 × 96 µm
Y
(PAD No. 56-175)
175
56
X
1
55
Pad Coordinates
Note: The ML9044-xxB does not have the dummy pads corresponding to the pad numbers 56 to 62 and 183 to
189 for the ML9044-xxA.
µ
µ
µ
µ
Pad
1
Symbol
V1
X ( m)
Y ( m)
Pad
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Symbol
DB3
DB2
DB1
DB0
E
X ( m)
Y ( m)
–5103
–4914
–4725
–4536
–4347
–4158
–3969
–3780
–3591
–3402
–3213
–3024
–2835
–2646
–2457
–2268
–2079
–1890
–1701
–1512
–1100
–1100
–1100
–1100
–1100
–1100
–1100
–1100
–1100
–1100
–1100
–1100
–1100
–1100
–1100
–1100
–1100
–1100
–1100
–1100
–1323
–1134
–945
–756
–567
–378
–189
0
–1100
–1100
–1100
–1100
–1100
–1100
–1100
–1100
–1100
–1100
–1100
–1100
–1100
–1100
–1100
–1100
–1100
–1100
–1100
–1100
2
V2
3
V3A
V3B
V4
4
5
W
6
V5
R/
7
V5IN
VCC
VC
RS0
RS1
SO
8
9
189
10
11
12
13
14
15
16
17
18
19
20
VlN
Sl
378
SHT
CS
OSC2
OSCR
OSC1
T3
BEB
VDD
CSR
SSR
567
756
945
1134
1323
1512
1701
1890
2079
2268
P
/S
VSS
DB7
DB6
DB5
DB4
T2
T1
COM1
COM2
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