欢迎访问ic37.com |
会员登录 免费注册
发布采购

ML9044-XXBCVWA 参数 Datasheet PDF下载

ML9044-XXBCVWA图片预览
型号: ML9044-XXBCVWA
PDF下载: 下载PDF文件 查看货源
内容描述: [Dot Matrix LCD Driver, 17 X 120 Dots, CMOS, 10.62 X 2.55 MM, GOLD BUMP, DIE-175]
分类和应用: 时钟驱动外围集成电路
文件页数/大小: 60 页 / 575 K
品牌: OKI [ OKI ELECTRONIC COMPONETS ]
 浏览型号ML9044-XXBCVWA的Datasheet PDF文件第11页浏览型号ML9044-XXBCVWA的Datasheet PDF文件第12页浏览型号ML9044-XXBCVWA的Datasheet PDF文件第13页浏览型号ML9044-XXBCVWA的Datasheet PDF文件第14页浏览型号ML9044-XXBCVWA的Datasheet PDF文件第16页浏览型号ML9044-XXBCVWA的Datasheet PDF文件第17页浏览型号ML9044-XXBCVWA的Datasheet PDF文件第18页浏览型号ML9044-XXBCVWA的Datasheet PDF文件第19页  
PEDL9044-03  
1
Semiconductor  
ML9044-xxA/xxB  
Address Counter (ADC)  
The address counter provides a read/write address for the DDRAM, ABRAM or CGRAM and also provides a  
cursor display address.  
When an instruction code specifying DDRAM, ABRAM or CGRAM address setting is input to the pre-defined  
register, the register selects the specified DDRAM, ABRAM or CGRAM and transfers the address code to the  
ADC. The address data in the ADC is automatically incremented (or decremented) by 1 after the display data is  
written in or read from the DDRAM, ABRAM or CGRAM.  
The data in the ADC is output to DB0 to DB6 when R/W = “H”, RS0 = “L”, RS1 = “H” and BF = “0”.  
Timing Generator  
The timing generator generates timing signals for the internal operation of the ML9044 activated by the instruction  
sent from the CPU or for the operation of the internal circuits of the ML9041 such as DDRAM, ABRAM,  
CGRAM and CGROM. Timing signals are generated so that the internal operation carried out for LCD displaying  
will not be interfered by the internal operation initiated by accessing from the CPU. For example, when the CPU  
writes data in the DDRAM, the display of the LCD not corresponding to the written data is not affected.  
15/60