PEDL9041A-02
OKI Semiconductor
ML9041A-xxA/xxB
3) Contrast Adjusting Data Read
RS1
RS0
0
R/W
DB7
0
DB6
0
DB5
0
DB4
G4
DB3
G3
DB2
G2
DB1
G1
DB0
G0
0
1
Expansion instruction code:
This instruction reads contrast adjusting data (G4 to G0) from the contrast register.
Note: The execution time of this instruction is 37 µs at an oscillation frequency (OSC) of 270 kHz.
4) ABRAM Address Setting
RS1
0
RS0
0
R/W
DB7
0
DB6
1
DB5
1
DB4
H4
DB3
H3
DB2
H2
DB1
H1
DB0
H0
1
Expansion instruction code:
This instruction sets the ABRAM address to the data represented by the bits H4 to H0 (binary).
The ABRAM addresses are valid until CGRAM or DDRAM addresses are set.
The CPU writes or reads the Display-ON data starting from the one represented by the ABRAM address bits H4
to H0 set in the instruction code at that time.
When the ABRAM address represented by bits H4 to H0 (binary) is in the range “00” to “13” in hexadecimal,
data is output to the LCD as the arbitrator.
Note: The execution time of this instruction is 37 µs at an oscillation frequency (OSC) of 270 kHz.
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