PEDL87V2105DIGEST-02
OKI Semiconductor
ML87V2105
No.
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77
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80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
Symbol
V
DD
N.C.
V
SS
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
TEST5
V
DD
TEST4
TEST3
TEST2
TEST1
N.C.
N.C.
N.C.
TESTM
SELF
V
SS
I/O
—
—
—
—
—
—
—
—
—
—
—
I
—
I
I
I
I
—
—
—
I
I
—
Pad Remarks
Pin Description
Power supply 3.3 V
Unused pin
Ground
Unused pin
Unused pin
Unused pin
Unused pin
Unused pin
Unused pin
Unused pin
Unused pin
Internal pull-down 50k Test input pin – bit 5 (1: test mode)
Power supply 3.3 V
Internal pull-down 50k Test input pin – bit 4 (1: test mode)
Internal pull-down 50k Test input pin – bit 3 (1: test mode)
Internal pull-down 50k Test input pin – bit 2 (1: test mode)
Internal pull-down 50k Test input pin – bit 1 (1: test mode)
Unused pin
Unused pin
Unused pin
Internal pull-down 50k Memory test input pin (1: test mode)
Internal pull-down 50k
Self refresh setting pin (0: Self refresh stopped, 1: Self refresh
operated)
Ground
Notes: Keep the test mode pins fixed to 0 or leave them open.
CL0 to CL7 and CLK0 are configured as inputs only in the test mode.
6/14
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