FEDL87V3104-03
OKI Semiconductor
ML87V3104
2.4.4 Cursor pattern register
The cursor pattern (shape) can be prepared by writing data in the 16 x 16 x 2-bit cursor pattern register. The data is
accessed in the 4-pixel packed format. (Fig. F2.4.4)
X = 0
Y = 0
1 2 3 4 5 6 7 8
2 bits
Y = 1
Y = 2
16 pixels
16
lines
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
Register
data
X = 4n + 0 X = 4n + 1 X = 4n + 2 X = 4n + 3
bit1 bit0 bit1 bit0 bit1 bit0 bit1 bit0
Cursor
Fig. F2.4.4 The cursor pattern register
• Control registers:
CSPTAY [#18h; bit5-2]:
CSPTAX [#18h; bit1-0]:
CSPTD0 [#19h; bit7-6]:
CSPTD1 [#19h; bit5-4]:
CSPTD2 [#19h; bit3-2]:
CSPTD3 [#19h; bit1-0]:
Cursor pattern register address Y (4 bits)
Cursor pattern register address X (higher 2 bits)
Cursor pattern register data (X address = 4n+0)
Cursor pattern register data (X address = 4n+1)
Cursor pattern register data (X address = 4n+2)
Cursor pattern register data (X address = 4n+3)
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