FEDL66525-02
OKI Semiconductor
ML66525 Family
PIN CONFIGURATION (TOP VIEW)
VBUS
P9_0/VBUSIN
P6_0/EXINT0
P6_1/EXINT1
P6_2/EXINT2
P6_3/EXINT3
P7_6/PWM0OUT
P7_7/PWM1OUT
FLAMOD
VDD_CORE
P2_3/A19
P2_2/A18
P2_1/A17
P2_0/A16
VTM
1
5
75
70
65
60
55
P1_7/A15
P1_6/A14
P1_5/A13
P1_4/A12
P1_3/A11
P1_2/A10
P1_1/A9
P1_0/A8
P4_7/A7
P4_6/A6
P4_5/A5
P4_4/A4
P4_3/A3
P4_2/A2
P4_1/A1
P4_0/A0
P8_0/RXD1
P8_1/TXD1
P8_2/RXC1
P8_3/TXC1
10
15
20
25
GND
V
DD_IO
P10_0/SIOCK3
P10_1/SIOI3
P10_2/SIOO3
P10_3/SIOCK4
P10_4/SIOO4
P10_5/SIOI4
P15_0/RXD6
P15_1/TXD6
P15_2/RXC6
P15_3/TXC6
V
DD_CORE
GND
DD_IO
V
100-pin Plastic TQFP
A symbol with “n” suffixed indicates an active Low pin.
6/27