¡ Semiconductor
ML63187/63189B
Table 2 Pin Descriptions (Secondary Functions) (continued)
Pin No.
Pad No.
Function Symbol
Type
Description
Timer 0 capture input pin.
ML63187 ML63189BML63187 ML63189B
PB.0/TM0CAP 75
74
75
74
75
76
77
70
71
88
89
88
89
90
91
84
85
98
99
I
I
Capture
Timer
PB.1/TM1CAP 76
PB.0/TM0OVF 75
PB.1/TM1OVF 76
PB.2/T02CK 77
PB.3/T13CK 78
Timer 1 capture input pin.
98
O
O
I
Timer 0 overflow flag output pin.
Timer 1 overflow flag output pin.
99
100
101
94
External clock input pin for timer 0 and timer 2.
External clock input pin for timer 1 and timer 3.
Shift register receive data input pin.
I
PE.0/SIN
71
I
PE.1/SOUT 72
95
O
Shift register transmit data output pin.
Shift register clock input-output pin.
Shift
Clock output when this device is used as a master
Register
PE.2/SCLK 73
72
86
96
I/O processor.
Clock input when this device is used as a slave
processor.
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