¡ Semiconductor
ML54051
1. FEATURES
• Single chip controller with internal microcontroller (min. 4 cycles/instruction execution)
• Operating voltage: 3.3 V, Interface voltage: 3.3 V/5 V
• Internal 256B RAM for card information structure (CIS) storage
• Conforms to PC card standard - PC card ATA specification
• Auto-sleep mode support
• True IDE Mode support
• ECC system by BCH code (3-bit random error correction is possible for user data and ECC data)
• Substitute control function (defect management function)
• Debug mode support
• External buffer (128KB SRAM) control is possible
• High-speed operation via dual port bus control
• Low power consumption due to single chip controller
• Control of multiple NAND flash memories (64MB to 512MB) is possible
Chip stand-alone
: 16 pcs max.
Chip and external decoder circuit : 64 pcs max.
• 144-pin LQFP package
(LQFP144-P-2020-0.50-K)
2. BLOCK DIAGRAM
External
CPU Bus
PCMCIA
I/F
Host I/F
PCMCIA
ATA
ROM
RAM
NAND
Flash
Bus
Media I/F
MPU
CIS
ECC
RAM Arbiter
External
SRAM
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