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ML2500BTA 参数 Datasheet PDF下载

ML2500BTA图片预览
型号: ML2500BTA
PDF下载: 下载PDF文件 查看货源
内容描述: 模拟存储单芯片录音/播放LSI用1M位单元闪存 [Analog-Storage Single-chip Record/Playback LSI with 1M Bit-Cell Flash Memory]
分类和应用: 闪存存储音频合成器集成电路消费电路商用集成电路光电二极管
文件页数/大小: 27 页 / 242 K
品牌: OKI [ OKI ELECTRONIC COMPONETS ]
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FEDL2500BFULL-02  
OKI Semiconductor  
ML2500BTA  
1.4. STADR Command (5H)  
You can specify the Start Address for recording with 13-bit data preceded by this command.  
You need to run the STADR command before you can use the REC command.  
Due to the design of memory array configuration, lower 4-bit of 13-bit Start Address defined is automatically set to  
“0H”. For further details, refer to “Addressable Memory Space for Recording” section. When this command is  
not executed prior to the REC command input, recording starts at the last defined Start Address. After resetting or  
power-on, the Start Address is set to the memory's starting address as default.  
1.5. SPADR command (6H)  
You can specify the Stop Address for recording with 13-bit data preceded by this command.  
You need to run the SPADR command before you can use the REC command.  
When this command is not executed prior to the REC command input, recording ends at the last defined Stop  
Address. After resetting or power-on, the Stop Address is set to the memory's last address as default.  
1.6. RDADR Command (7H)  
By using this command you can read the address pointed by the current Memory Address Counter via serial  
interface. In sync with SCK signal following to the RDADR command, 13-bit Memory Address Counter's value,  
starting with the MSB, is output to the DO pin. The DO pin's output falls down to “L” level after 13th bit.  
Right after recording stops, use this command to read the Stop Address of the phrase that has just been recorded.  
This allows the external MCU to control addresses for recorded phrases. This command can be input during  
recording and record pausing. However, running the RDADR command after the STADR (SPADR) command  
input, lets the LSI output the address defined by the STADR (SPADR) command.  
1.7. RDSTAT Command (8H)  
By using this command you can read out the values of the internal Status Register via serial interface. Reading the  
Status Register’s values lets you know ML2500B’s internal status as shown in the table below.  
In sync with SCK signal following to the RDSTAT command bits, 4-bit Status Register’s data is output to the DO  
pin, starting with the MSB. The DO pin’s output after 4th bit falls down to the GND level.  
Read Bit  
03  
Name  
MON  
Status Description  
Output “H” level while in record/playback operation, physical  
recording/playback time plus memory control time. This output is  
identical value to that of the MON pin.  
Output “H” level while recording/playback being suspended by the  
PAUSE command.  
Output “H” level while in record/playback operation, physical  
recording/playback time only without memory control time.  
Output “H” level simultaneously when the MON pin turns “L” level as  
recording/playback ends by reaching the last address of memory.  
02  
01  
00  
VPM  
RPM  
FULL  
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