FEDL2215-01
Semiconductor
ML2215
1
PIN DESCRIPTIONS
Pin
Symbol
Type
l
Description
“L” input to this pin turns the LSI into standby mode. At this point, output from
the AOUT pin rises up to VDD level, having the LSl initialized internally. By “H”
input to the pin the AOUT output returns to 1/2 VDD level.
17 (19)
RESET
This pin outputs a signal showing empty/full status of the Phase Address
Latch Resister. “H” level indicates the register is empty, and thus the LSI is
ready to accept serial data input. At powering up, the pin outputs “H level”.
2 (4)
3 (5)
NAR
O
O
Output “L” level while output signal is present either at the AOUT or MD pin.
At powering up, the pin outputs “H” level.
BUSY
4 (6)
7 (7)
MD
VREF
AOUT
GND
CLK
Sl
O
I
Music output pin
DAC reference pin. Leave this pin open when not used.
Analog output pin
9 (9)
O
—
l
8 (8)
Ground pin
12 (16)
18 (20)
External clock input pin
Serial clock input pin
l
Serial data input pin. Input a phrase code corresponding to a phrase address
through this pin.
19 (21)
13 (17)
11 (15)
SD
l
l
This pin is used when 3-pin interfacing is selected. When 3-pin inter-facing is
selected, input to the SD and Sl pins is valid while the ST pin being held “L”.
When this pin is at “H” level, speech synthesis is started. When 2-pin
interfacing is selected, connect this pin to GND. Mask option allows the user
to select either 3-pin interfacing or 2-pin interfacing.
ST
Power supply pin. Insert 0.1 µF or larger bypass capacitor between this pin
and the GND pin.
VDD
—
* 20-pin plastic SSOP (24-pin plastic SOP)
4/26
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