PEDL70215-01
OKI Semiconductor
MK70215
CONNECTOR PIN DESCRIPTIONS
MK70215
INSIDE
PULL
UP/DOWN
—
—
TERMINAL NAME I/O TYPE
RF_ANT (
*1
)
UART_TD
UART_RD
UART_RTS
UART_CTS
PCM_IN (
*2
)
PCM_OUT
PCM_SYNC (
*3
)
PCM_CLK (
*3
)
nRESET(
*4
)
nDetach
CIO2
CIO3
CIO4
CIO5
CIO6
Vdd (
*5
)
GND
AGND
I/O
O
I
O
I
I
O
I/O
I/O
I
I
I
O
O
I
I
–
–
–
FUNCTION
Z0=50Ω
UART Data Output
UART Data Input
UART Ready to Send
UART Clear to Send
Synchronous 8kss-1 Data Input
Synchronous 8kss-1 Data Output
Synchronous Data Strobe
Synchronous Data Clock
Active low reset (L:Reset)
Active low sleep signal (L:Sleep)
—
—
—
—
—
Schmitt
—
—
Pull up
—
Pull down
Pull down
Pull up
Pull up
Pull up
—
—
Pull up
Pull up
—
—
—
Power Supply Voltage
—
—
*1 Terminated to a 50Ω load or connected to ANT.
*2 The PCM_IN pins are pulled-up internally.
*3 The PCM_CLK, and PCM_SYNC pins are pulled-down internally.
*4 Setting the reset signal input pin RESET to a “L” level can reset the LSI. The reset state of the LSI is held for a
duration of 10 msec even after the reset signal is switched to a “H” level.
*5 Mount an approximately 10µF tantalum or electrolytic capacitor to the power supply input pin.
The capacitor should be mounted as close to the power supply pin of the module as possible.
* The PCM I/F is only valid in the HCI mode.
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