E2G1054-18-62
¡ Semiconductor
MD56V62800A
¡ Semiconductor
This version: Jun. 1998
MD56V62800A
e
Pr
lim
y
ar
in
4-Bank
¥
2,097,152-Word
¥
8-Bit SYNCHRONOUS DYNAMIC RAM
DESCRIPTION
The MD56V62800A is a 4-bank
¥
2,097,152-word
¥
8-bit synchronous dynamic RAM, fabricated
in Oki's CMOS silicon-gate process technology. The device operates at 3.3 V. The inputs and
outputs are LVTTL compatible.
FEATURES
•
•
•
•
•
•
•
Silicon gate, quadruple polysilicon CMOS, 1-transistor memory cell
4-bank
¥
2,097,152-word
¥
8-bit configuration
3.3 V power supply,
±0.3
V tolerance
Input
: LVTTL compatible
Output : LVTTL compatible
Refresh : 4096 cycles/64 ms
Programmable data transfer mode
–
CAS
latency (1, 2, 3)
– Burst length (1, 2, 4, 8, full page)
– Data scramble (sequential, interleave)
• Burst read single bit write capability
• CBR auto-refresh, Self-refresh capability
• Package:
54-pin 400 mil plastic TSOP (Type II) (TSOPII54-P-400-0.80-K) (Product : MD56V62800A-xxTA)
xx indicates speed rank.
PRODUCT FAMILY
Family
MD56V62800A-8
MD56V62800A-10
Max.
Frequency
125 MHz
100 MHz
Access Time (Max.)
t
AC2
10 ns
9 ns
t
AC3
6 ns
9 ns
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