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MD56V62320K-6TAZ03 参数 Datasheet PDF下载

MD56V62320K-6TAZ03图片预览
型号: MD56V62320K-6TAZ03
PDF下载: 下载PDF文件 查看货源
内容描述: [Synchronous DRAM, 2MX32, 5.4ns, CMOS, PDSO86, 0.400 INCH, 0.80 MM PITCH, LEAD FREE, PLASTIC, TSOP2-86]
分类和应用: 动态存储器光电二极管
文件页数/大小: 37 页 / 395 K
品牌: OKI [ OKI ELECTRONIC COMPONETS ]
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PEDD56V62320K-01
OKI Semiconductor
MD56V62320K
Mode Set Address Keys
Write Mode
CAS
Latency
Burst Type
Burst Length
A9
0
1
WM
Normal
Single Write
A6 A5
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
A4
0
1
0
1
0
1
0
1
CL
Reserved
Reserved
2
3
Reserved
Reserved
Reserved
Reserved
A3
0
1
BT
Sequential
A2
0
0
0
0
1
1
1
1
A1 A0
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
BT = 0
1
2
4
8
Reserved
Reserved
Reserved
Full Page
BT = 1
1
2
4
8
Reserved
Reserved
Reserved
Reserved
Interleave
Notes: A7, A8, A10, BA0 and BA1 should stay “L” during mode set cycle.
MD56V62320K supports two methods of Power on Sequence.
POWER ON SEQUENCE 1
1. With inputs in NOP state and CKE=High, turn on the power supply and start the system clock.
2. After the V
CC
voltage has reached the specified level, pause for 200
µs
or more with the input kept in
NOP state.
3. Issue the precharge all bank command.
4. Apply a auto-refresh eight or more times.
5. Enter the mode register setting command.
POWER ON SEQUENCE 2
1. With inputs in NOP state and CKE=High, turn on the power supply and start the system clock.
2. After the V
CC
voltage has reached the specified level, pause for 200
µs
or more with the input kept in
NOP state.
3. Issue the precharge all bank command.
4. Enter the mode register setting command.
5. Apply a auto-refresh eight or more times.
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