TDA6650TT; TDA6651TT
NXP Semiconductors
5 V mixer/oscillator and low noise PLL synthesizer
13. Application information
13.1 Tuning amplifier
The tuning amplifier is capable of driving the varicap voltage without an external transistor.
The tuning voltage output must be connected to an external load of 15 kΩ which is
connected to the tuning voltage supply rail. The loop filter design depends on the oscillator
characteristics and the selected reference frequency as well as the required PLL loop
bandwidth.
Applications with the TDA6650TT; TDA6651TT have a large loop bandwidth, in the order
of a few tens of kHz. The calculation of the loop filter elements has to be done for each
application, it depends on the reference frequency and charge pump current.
13.2 Crystal oscillator
The TDA6650TT; TDA6651TT needs to be used with a 4 MHz crystal in series with a
capacitor with a typical value of 18 pF, connected between pin XTAL1 and pin XTAL2.
NXP crystal 4322 143 04093 is recommended. When choosing a crystal, take care to
select a crystal able to withstand the drive level of the TDA6650TT; TDA6651TT without
suffering from accelerated ageing. For optimum performances, it is highly recommended
to connect the 4 MHz crystal without any serial resistance.
The crystal oscillator of the TDA6650TT; TDA6651TT should not be driven (forced) from
an external signal.
Do not use the signal on pin XTAL1 or pin XTAL2, or the signal present on the crystal, to
drive an external IC or for any other use as this may dramatically degrade the phase noise
performance of the TDA6650TT; TDA6651TT.
13.3 Examples of I2C-bus program sequences
Table 23 to 30 show various sequences where:
S = START
A = acknowledge
P = STOP.
The following conditions apply:
LO frequency is 800 MHz
fcomp = 166.666 kHz
Divider ratio (programmable) N = 4800
BS3 output port is on and all other ports are off: thus the high band is selected
Charge pump current ICP = 280 µA
Normal mode, with XTOUT buffer on
IAGC = 220 nA
AGC take-over point is set to 112 dBµV (p-p)
Address selection is adjusted to make address C2 valid.
TDA6650TT_6651TT_5
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 05 — 10 January 2007
45 of 54
NXP [ NXP ]
