Philips Semiconductors
Product specification
80C51 8-bit microcontroller family
8K–64K/256–1K OTP/ROM/ROMless, low voltage (2.7V–5.5V),
low power, high speed (33MHz)
8XC52/54/58/80C32
8XC51FA/FB/FC/80C51FA
8XC51RA+/RB+/RC+/RD+/80C51RA+
Table 1.
SYMBOL
ACC*
AUXR#
AUXR1#
B*
DPTR:
DPH
DPL
IE*
IP*
IPH#
P0*
P1*
P2*
P3*
PCON#
1
PSW*
RCAP2H#
RCAP2L#
SADDR#
SADEN#
SBUF
SCON*
SP
TCON*
T2CON*
T2MOD#
TH0
TH1
TH2#
TL0
TL1
TL2#
8XC52/54/58/80C32 Special Function Registers
DESCRIPTION
Accumulator
Auxiliary
Auxiliary 1
B register
Data Pointer (2 bytes)
Data Pointer High
Data Pointer Low
Interrupt Enable
Interrupt Priority
Interrupt Priority High
Port 0
Port 1
Port 2
Port 3
Power Control
Program Status Word
Timer 2 Capture High
Timer 2 Capture Low
Slave Address
Slave Address Mask
Serial Data Buffer
Serial Control
Stack Pointer
Timer Control
Timer 2 Control
Timer 2 Mode Control
Timer High 0
Timer High 1
Timer High 2
Timer Low 0
Timer Low 1
Timer Low 2
DIRECT
ADDRESS
E0H
8EH
A2H
F0H
83H
82H
AF
A8H
B8H
B7H
80H
90H
A0H
B0H
87H
D0H
CBH
CAH
A9H
B9H
99H
9F
98H
81H
8F
88H
C8H
C9H
8CH
8DH
CDH
8AH
8BH
CCH
TF1
CF
TF2
–
8E
TR1
CE
EXF2
–
8D
TF0
CD
RCLK
–
8C
TR0
CC
TCLK
–
8B
IE1
CB
EXEN2
–
8A
IT1
CA
TR2
–
89
IE0
C9
C/T2
T2OE
88
IT0
C8
CP/RL2
DCEN
00H
xxxxxx00B
00H
00H
00H
00H
00H
00H
00H
00H
SM0/FE
BIT ADDRESS, SYMBOL, OR ALTERNATIVE PORT FUNCTION
MSB
LSB
E7
–
–
F7
E6
–
–
F6
E5
–
–
F5
E4
–
LPEP
3
F4
E3
–
GF3
F3
E2
–
0
F2
E1
–
–
F1
E0
AO
DPS
F0
RESET
VALUE
00H
xxxxxxx0B
xxx0xxx0B
00H
00H
00H
AE
–
BE
–
B6
–
86
AD6
96
–
A6
AD14
B6
WR
SMOD0
D6
AC
AD
ET2
BD
PT2
B5
PT2H
85
AD5
95
–
A5
AD13
B5
T1
–
D5
F0
AC
ES
BC
PS
B4
PSH
84
AD4
94
–
A4
AD12
B4
T0
POF
2
D4
RS1
AB
ET1
BB
PT1
B3
PT1H
83
AD3
93
–
A3
AD11
B3
INT1
GF1
D3
RS0
AA
EX1
BA
PX1
B2
PX1H
82
AD2
92
–
A2
AD10
B2
INT0
GF0
D2
OV
A9
ET0
B9
PT0
B1
PT0H
81
AD1
91
T2EX
A1
AD9
B1
TxD
PD
D1
–
A8
EX0
B8
PX0
B0
PX0H
80
AD0
90
T2
A0
AD8
B0
RxD
IDL
D0
P
000000x0B
00H
00H
00H
00H
xxxxxxxxB
FFH
00xx0000B
FFH
FFH
FFH
xx000000B
xx000000B
0x000000B
EA
BF
–
B7
–
87
AD7
97
–
A7
AD15
B7
RD
SMOD1
D7
CY
9E
SM1
9D
SM2
9C
REN
9B
TB8
9A
RB8
99
TI
98
RI
00H
07H
TMOD
Timer Mode
89H
GATE
* SFRs are bit addressable.
# SFRs are modified from or added to the 80C51 SFRs.
– Reserved bits.
1. Reset value depends on reset source.
2. Bit will not be affected by Reset.
3. LPEP – Low Power OTP–EPROM only operation.
C/T
M1
M0
GATE
C/T
M1
M0
1999 Apr 01
10
PHILIPS [ NXP SEMICONDUCTORS ]
