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MC34PF4210A0ES 参数 Datasheet PDF下载

MC34PF4210A0ES图片预览
型号: MC34PF4210A0ES
PDF下载: 下载PDF文件 查看货源
内容描述: [14-channel power management integrated circuit (PMIC) for audio/video applications]
分类和应用: 集成电源管理电路
文件页数/大小: 137 页 / 1328 K
品牌: NXP [ NXP ]
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NXP Semiconductors  
PF4210  
14-channel power management integrated circuit (PMIC) for audio/video applications  
Table 78.ꢀSW4 register summary  
Register  
Address  
0x4A  
Description  
SW4VOLT  
SW4STBY  
SW4OFF  
Output voltage set point on normal operation  
Output voltage set point on standby  
Output voltage set point on sleep  
Switching mode selector register  
DVS, phase, frequency and ILIM configuration  
0x4B  
0x4C  
SW4MODE  
SW4CONF  
0x4D  
0x4E  
Table 79.ꢀRegister SW4VOLT - ADDR 0x4A  
Name  
Bit number  
R/W  
Default Description  
SW4  
5:0  
R/W  
0x00  
Sets the SW4 output voltage during normal operation mode.  
See Table 77 for all possible configurations.  
SW4  
6
7
R
0x00  
Sets the operating output voltage range for SW4. Set during  
OTP or TBB configuration only. See Table 77 for all possible  
configurations.  
UNUSED  
0x00  
unused  
Table 80.ꢀRegister SW4STBY - ADDR 0x4B  
Name  
Bit number  
R/W  
Default Description  
SW4STBY  
5:0  
R/W  
0x00  
Sets the SW4 output voltage during standby mode. See  
Table 77 for all possible configurations.  
SW4STBY  
UNUSED  
6
7
R
0x00  
Sets the operating output voltage range for SW4 in standby  
mode. This bit inherits the value configured on bit SW4[6]  
during OTP or TBB configuration. See Table 77 for all  
possible configurations.  
0x00  
unused  
Table 81.ꢀRegister SW4OFF - ADDR 0x4C  
Name  
Bit number  
R/W  
Default Description  
SW4OFF  
5:0  
R/W  
0x00  
Sets the SW4 output voltage during sleep mode. See  
Table 77 for all possible configurations.  
SW4OFF  
UNUSED  
6
7
R
0x00  
Sets the operating output voltage range for SW4 in sleep  
mode. This bit inherits the value configured in bit SW4[6]  
during OTP or TBB configuration. See Table 77 for all  
possible configurations.  
0x00  
unused  
Table 82.ꢀRegister SW4MODE - ADDR 0x4D  
Name  
Bit number  
R/W  
Default Description  
0x08 Sets the SW4 switching operation mode. See Table 29 for all  
SW4MODE  
3:0  
R/W  
possible configurations.  
PF4210  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2018. All rights reserved.  
Data sheet: technical data  
Rev. 2.0 — 14 November 2018  
77 / 137  
 
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