LPC540xx
NXP Semiconductors
32-bit ARM Cortex-M4 microcontroller
Table 19. Typical AHB/APB peripheral power consumption [3][4][5]
Tamb = 25 °C, VDD = 3.3 V;
Peripheral
IDD in uA/MHz
CPU: 12 MHz,
IDD in uA/MHz
IDD in uA/MHz
IDD in uA/MHz
CPU: 180 MHz,
Async APB peripheral
CPU: 48 MHz, sync CPU: 96 MHz,
Async APB bus: 12 APB bus: 12 MHz[2] Async APB bus: 12 Async APB bus:
MHz
MHz[2]
12 MHz[2]
Timer3
Timer4
0.9
0.9
0.9
0.9
0.9
0.9
0.9
0.9
[1] Turn off the peripheral when the configuration is done.
[2] For optimal system power consumption, use fixed low frequency Async APB bus when the CPU is at a
higher frequency.
[3] The supply current per peripheral is measured as the difference in supply current between the peripheral
block enabled and the peripheral block disabled using ASYNCAPBCLKCTRL, AHBCLKCTRL0/1, and
PDRUNCFG0/1 registers. All other blocks are disabled and no code accessing the peripheral is executed.
[4] The supply currents are shown for system clock frequencies of 12 MHz, 48 MHz, 96 MHz and 180 MHz.
[5] Typical ratings are not guaranteed. Characterized through bench measurements using typical samples.
10.4 Pin characteristics
Table 20. Static characteristics: pin characteristics
Tamb = 40 C to +105 C, unless otherwise specified. 1.71 V VDD 3.6 V unless otherwise specified. Values tested in
production unless otherwise specified.
Symbol Parameter
RESET pin
Conditions
Min
Typ[1] Max
Unit
VIH
VIL
HIGH-level input voltage
0.8 VDD
0.5
-
-
-
5.0
V
V
V
LOW-level input voltage
hysteresis voltage
0.3 VDD
[14]
Vhys
0.05 VDD
-
Standard I/O pins
Input characteristics
IIL
IIH
IIH
VI
LOW-level input current
VI = 0 V; on-chip pull-up resistor
disabled.
-
-
3.0
3.0
3.0
180
180
180
nA
nA
nA
HIGH-level input current VI = VDD; VDD = 3.6 V; for RESETN
pin.
HIGH-level input current VI = VDD; on-chip pull-down resistor
disabled
[3]
input voltage
pin configured to provide a digital
function;
VDD 1.8 V
0
-
-
-
-
-
-
-
5.0
3.6
5.0
5.0
+0.4
+0.8
-
V
V
V
V
V
V
V
VDD = 0 V
0
VIH
VIL
HIGH-level input voltage 1.71 V VDD < 2.7 V
2.7 V VDD 3.6 V
1.5
2.0
LOW-level input voltage 1.71 V VDD < 2.7 V
2.7 V VDD 3.6 V
0.5
0.5
0.1 VDD
[14]
Vhys
hysteresis voltage
Output characteristics
VO
output voltage
output active
0
-
VDD
V
LPC540xx
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© NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet
Rev. 1.8 — 22 June 2018
96 of 168
NXP [ NXP ]
