LPC540xx
NXP Semiconductors
32-bit ARM Cortex-M4 microcontroller
Table 4.
Symbol
Pin description …continued
Description
[2]
PIO4_14
-
B5 194
-
PU; Z I/O PIO4_14 — General-purpose digital input/output pin.
I
ENET_RX_CLK — Ethernet Receive Clock (MII interface)
or Ethernet Reference Clock (RMII interface).
O
CT4_MAT1 — Match output 1 from Timer 4.
I/O FC9_SCK — Flexcomm 9: USART or SPI clock.
R — Reserved.
I
SCT0_GPI7 — Pin input 7 to SCTimer/PWM.
[2]
[2]
[2]
PIO4_15
PIO4_16
PIO4_17
-
-
-
A4 197
-
-
-
PU; Z I/O PIO4_15 — General-purpose digital input/output pin.
O
O
ENET_MDC — Ethernet management data clock.
CT4_MAT2 — Match output 2 from Timer 4.
I/O FC9_RXD_SDA_MOSI — Flexcomm 9: USART receiver,
I2C data I/O, SPI master-out/slave-in data.
C4 203
PU; Z I/O PIO4_16 — General-purpose digital input/output pin.
I/O ENET_MDIO — Ethernet management data I/O.
O
CT4_MAT3 — Match output 3 from Timer 4.
I/O FC9_TXD_SCL_MISO — Flexcomm 9: USART transmitter,
I2C clock, SPI master-in/slave-out data.
-
6
PU; Z I/O PIO4_17 — General-purpose digital input/output pin.
R — Reserved.
O
I
CAN1_TD — Transmitter output for CAN 1.
CT1_CAP2 — Capture 2 input to Timer 1.
UTICK_CAP0 — Micro-tick timer capture input 0.
R — Reserved.
I
O
EMC_BLSN[2] — External memory interface byte lane
select 2 (active low).
[2]
PIO4_18
-
-
10
-
PU; Z I/O PIO4_18 — General-purpose digital input/output pin.
R — Reserved.
I
I
I
CAN1_RD — Receiver input for CAN 1.
CT1_CAP3 — Capture 3 input to Timer 1.
UTICK_CAP1 — Micro-tick timer capture input 1.
R — Reserved.
O
EMC_BLSN[3] — External memory interface byte lane
select 3 (active low).
LPC540xx
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© NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet
Rev. 1.8 — 22 June 2018
46 of 168
NXP [ NXP ]
