LPC540xx
NXP Semiconductors
32-bit ARM Cortex-M4 microcontroller
Table 4.
Symbol
Pin description …continued
Description
[2]
[2]
[2]
PIO2_5
PIO2_6
PIO2_7
-
-
-
C1 12
-
-
-
PU; Z I/O PIO2_5 — General-purpose digital input/output pin.
O
O
ENET_TX_ER — Ethernet Transmit Error (MII interface).
SD_POW_EN — SD/MMC card power enable
I/O FC1_CTS_SDA_SSEL0 — Flexcomm 1: USART
clear-to-send, I2C data I/O, SPI Slave Select 0.
O
CT1_MAT2 — Match output 2 from Timer 1.
PU; Z I/O PIO2_6 — General-purpose digital input/output pin.
ENET_TX_CLK — Ethernet Transmit Clock (MII interface).
F3
J2
F4
17
29
32
I
I/O SD_D[0] — SD/MMC data 0.
I/O FC1_RTS_SCL_SSEL1 — Flexcomm 1: USART
request-to-send, I2C clock, SPI slave select 1.
I
CT0_CAP0 — Capture input 0 to Timer 0.
PU; Z I/O PIO2_7 — General-purpose digital input/output pin.
ENET_COL — Ethernet Collision detect (MII interface).
I/O SD_D(1) — SD/MMC data 1.
I
I
FREQME_GPIO_CLK_B — Frequency Measure pin clock
input B.
I
CT0_CAP1 — Capture input 1 to Timer 0.
[2]
PIO2_8
PIO2_9
-
-
-
-
PU; Z I/O PIO2_8 — General-purpose digital input/output pin.
ENET_RXD2 — Ethernet Receive Data 2 (MII interface).
I
I/O SD_D[2] — SD/MMC data 2.
R — Reserved.
O
CT0_MAT0 — Match output 0 from Timer 0.
PU; Z I/O PIO2_9 — General-purpose digital input/output pin.
ENET_RXD3 — Ethernet Receive Data 3 (MII interface).
[2]
K2 36
I
I/O SD_D[3] — SD/MMC data 3.
R — Reserved.
O
CT0_MAT1 — Match output 0 from Timer 1.
[2]
[2]
PIO2_10
PIO2_11
-
-
P1 39
-
-
PU; Z I/O PIO2_10 — General-purpose digital input/output pin.
I
I
ENET_RX_ER — Ethernet receive error (RMII/MII
interface).
SD_CARD_DET_N — SD/MMC card detect (active low).
K3 43
PU; Z I/O PIO2_11 — General-purpose digital input/output pin.
O
O
LCD_PWR — LCD panel power enable.
SD_VOLT[0] — SD/MMC card regulator voltage control [0].
R — Reserved.
R — Reserved.
I/O FC5_SCK — Flexcomm 5: USART or SPI clock.
LPC540xx
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© NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet
Rev. 1.8 — 22 June 2018
32 of 168
NXP [ NXP ]
