LPC540xx
NXP Semiconductors
32-bit ARM Cortex-M4 microcontroller
Table 58. Revision history …continued
Document ID
Release date Data sheet status
Change notice Supersedes
Modifications:
• Updated features in Section 7.14.8.2 “SPI serial I/O controller”: Maximum data rates of
48 Mbit/s in master mode for SPI functions (Flexcomm Interface 0-9) and 50 Mbit/s in
master mode for SPI functions (Flexcomm Interface 10).
• Updated Section 11.13 “SPI interfaces (Flexcomm Interface 0-9)”: The maximum
supported bit rate for SPI master mode is 48 Mbit/s. Was 71 Mbit/s in master mode.
• Updated footnote 2 of Table 5 “Termination of unused pins”.
• Updated Table 15 “Static characteristics: Power consumption in deep-sleep and deep
power-down modes”: Changed deep-sleep conditions for Idd supply current, SRAMX
(64 KB) powered for 25 C and 105 C, was 32 KB.
• Updated Table 16 “Static characteristics: Power consumption in deep-sleep and deep
power-down modes”: Changed deep-sleep conditions for Idd supply current, SRAMX
(64 KB) powered for 25 C and 105 C, was 32 KB.
LPC540xx v.1.2
Modifications:
20180104
Product data sheet
-
v.1.1
• Added Figure 13 “CoreMark power consumption: typical mA/MHz vs. frequency (MHz)
SRAMX”, Figure 14 “Deep-sleep mode: Typical supply current IDD versus temperature
for different supply voltages VDD”, and Figure 15 “Deep power-down mode: Typical
supply current IDD versus temperature for different supply voltages VDD”.
• Updated Table 53 “Temperature sensor static and dynamic characteristics” and Table
54 “Temperature sensor Linear-Least-Square (LLS) fit parameters”.
• Updated Table 14 “Static characteristics: Power consumption in active and sleep
mode”: values for IDD Supply current CoreMark code executed from SRAMX.
• Updated Table 15 “Static characteristics: Power consumption in deep-sleep and deep
power-down modes”: values for deep sleep and deep power-down modes.
• Updated Table 16 “Static characteristics: Power consumption in deep-sleep and deep
power-down modes”: values for deep sleep and deep power-down modes.
• Updated Table 17 “Static characteristics: Power consumption in deep power-down
mode”: value for deep power-down mode.
• Updated table notes for Table 4 “Pin description”, Table 5 “Termination of unused pins”,
and Table 6 “Pin states in different power modes”.
• Updated text in Section 13.2 “Standard I/O pin configuration”.
• Added text to Table note 4 of Figure 43 “Power, clock, and debug connections”.
LPC540xx v.1.1
Modifications:
LPC540xx v.1
20171207
• Removed Figure 12 through Figure 15.
20171128 Product data sheet
Product data sheet
-
v.1.0
-
-
LPC540xx
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© NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet
Rev. 1.8 — 22 June 2018
164 of 168
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