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LPC54018JBD208 参数 Datasheet PDF下载

LPC54018JBD208图片预览
型号: LPC54018JBD208
PDF下载: 下载PDF文件 查看货源
内容描述: [32-bit ARM Cortex-M4 microcontroller]
分类和应用:
文件页数/大小: 168 页 / 3551 K
品牌: NXP [ NXP ]
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LPC540xx  
NXP Semiconductors  
32-bit ARM Cortex-M4 microcontroller  
13.6.1 XTAL Printed Circuit Board (PCB) design guidelines  
Connect the crystal and external load capacitors on the PCB as close as possible to  
the oscillator input and output pins of the chip.  
The length of traces in the oscillation circuit should be as short as possible and must  
not cross other signal lines.  
Ensure that the load capacitors CX1, CX2, and CX3, in case of third overtone crystal  
usage, have a common ground plane.  
Loops must be made as small as possible to minimize the noise coupled in through  
the PCB and to keep the parasitics as small as possible.  
Lay out the ground (GND) pattern under crystal unit.  
Do not lay out other signal lines under crystal unit for multi-layered PCB.  
13.7 Suggested USB interface solutions  
The USB device can be connected to the USB as self-powered device (see Figure 49) or  
bus-powered device (see Figure 50).  
On the LPC540xx, the USB_VBUS pin is 5 V tolerant only when VDD is applied and at  
operating voltage level. Therefore, if the USB_VBUS function is connected to the USB  
connector and the device is self-powered, the USB_VBUS pin must be protected for  
situations when VDD = 0 V.  
If VDD is always at operating level while VBUS = 5 V, the USB_VBUS pin can be  
connected directly to the VBUS pin on the USB connector.  
For systems where VDD can be 0 V and VBUS is directly applied to the VBUS pin,  
precautions must be taken to reduce the voltage to below 3.6 V, which is the maximum  
allowable voltage on the USB_VBUS pin in this case.  
One method is to use a voltage divider to connect the USB_VBUS pin to the VBUS on the  
USB connector. The voltage divider ratio should be such that the USB_VBUS pin is  
greater than 0.7 VDD to indicate a logic HIGH while below the 3.6 V allowable maximum  
voltage.  
For the following operating conditions  
VBUSmax = 5.25 V  
V
DD = 3.6 V,  
the voltage divider should provide a reduction of 3.6 V/5.25 V or ~0.686 V.  
LPC540xx  
All information provided in this document is subject to legal disclaimers.  
© NXP Semiconductors N.V. 2018. All rights reserved.  
Product data sheet  
Rev. 1.8 — 22 June 2018  
152 of 168  
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