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LPC54018JBD208 参数 Datasheet PDF下载

LPC54018JBD208图片预览
型号: LPC54018JBD208
PDF下载: 下载PDF文件 查看货源
内容描述: [32-bit ARM Cortex-M4 microcontroller]
分类和应用:
文件页数/大小: 168 页 / 3551 K
品牌: NXP [ NXP ]
 浏览型号LPC54018JBD208的Datasheet PDF文件第6页浏览型号LPC54018JBD208的Datasheet PDF文件第7页浏览型号LPC54018JBD208的Datasheet PDF文件第8页浏览型号LPC54018JBD208的Datasheet PDF文件第9页浏览型号LPC54018JBD208的Datasheet PDF文件第11页浏览型号LPC54018JBD208的Datasheet PDF文件第12页浏览型号LPC54018JBD208的Datasheet PDF文件第13页浏览型号LPC54018JBD208的Datasheet PDF文件第14页  
LPC540xx  
NXP Semiconductors  
32-bit ARM Cortex-M4 microcontroller  
JTAG test and  
FS USB  
bus  
ISP access boundary scan  
ethernet  
PHY interface  
LCD  
panel  
SDIO  
interface  
CAN  
interface  
port  
interface  
Xtalin Xtalout RST  
CLOCK GENERATION,  
DEBUG INTERFACE  
GENERAL  
PURPOSE  
DMA  
ETHERNET  
10/100  
MAC  
USB 2.0  
HOST/  
LCD  
clocks  
and  
controls  
POWER CONTROL,  
AND OTHER  
CAN  
FD  
CAN  
FD  
CLK  
OUT  
SDIO  
SHA  
PANEL  
ARM CORTEX-M4  
WITH FPU/MPU  
DEVICE  
INTERFACE  
SYSTEM FUNCTIONS  
CONTROLLER  
+AVB  
H
D
internal  
power  
I-code D-code system  
Vdd  
VOLTAGE REGULATOR  
bus  
bus  
bus  
BOOT ROM  
64 kB  
HS USB  
PHY  
HS USB  
bus  
SRAM  
192 kB  
SPI FLASH  
INTERFACE  
SPIFI  
SRAM  
64 kB  
SRAM  
32 kB  
MULTILAYER  
AHB MATRIX  
SRAM  
32 kB  
SRAM  
32 kB  
FS USB  
HOST  
REGISTERS  
HS USB  
HOST  
REGISTERS  
POLYFUSE 12b ADC  
SHA SLAVE  
INTERFACE  
ADC  
inputs  
OTP 256 b  
12-CH  
TEMP  
SENSOR  
USB RAM  
INTERFACE  
SRAM  
8 kB  
D[31:0]  
A[25:0]  
control  
GPIO  
STATIC/DYNAMIC EXT  
MEMORY CONTROLLER  
HS GPIO  
0-5  
SPIFI  
REGISTERS  
EMC  
REGISTERS  
DMA  
REGISTERS  
LCD  
REGISTERS  
FS USB  
DEVICE  
REGISTERS  
SCTimer/  
PWM  
FlexComms 0-4  
-UARTs 0-4 - I2Cs 0-4  
-SPI0s 0-4  
CAN 0  
CAN 1  
ETHERNET  
REGISTERS  
HS USB  
DEVICE  
CRC  
SDIO  
FlexComms 5-9  
REGISTERS  
REGISTERS  
ENGINE  
REGISTERS  
-UARTs 5-9  
REGISTERS  
-SPI0s 5-9  
-I2Cs 5-9 - I2Ss 0,1  
AUDIO SUBSYS  
D-MIC,  
AHB TO  
APB BRIDGE  
APB slave group 0  
DECIMATOR, ETC  
ASYNC AHB TO  
APB BRIDGE  
APB slave group 2  
SYSTEM CONTROL  
SYSTEM CONTROL (async regs)  
I/O CONFIGURATION  
AHB TO  
APB BRIDGE  
2 x 32-BIT TIMERS (T3, 4)  
GPIO GLOBAL INTRPTS (0, 1)  
GPIO INTERRUPT CONTROL  
PERIPH INPUT MUX SELECTS  
2 x 32-BIT TIMERS (T0, 1)  
MULTI-RATE TIMER  
APB slave group 1  
PMU REGS (+BB, PVT)  
32-BIT TIMERS (T2)  
RIT  
2 x SMARTCARDS  
RANDOM NUMBER GEN  
OTP CONTROLLER  
RTC POWER  
DOMAIN  
RTC ALARM  
WATCHDOG  
OSC  
WINDOWED WDT  
REAL TIME  
CLOCK  
32 kHz  
Osc  
DIVIDER  
MICRO TICK TIMER  
Note:  
- Orange shaded blocks support Gen. Purpose DMA.  
- Yellow shaded blocks include dedicated DMA Ctrl.  
aaa-029063  
Fig 4. LPC540xx Block diagram  
LPC540xx  
All information provided in this document is subject to legal disclaimers.  
© NXP Semiconductors N.V. 2018. All rights reserved.  
Product data sheet  
Rev. 1.8 — 22 June 2018  
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