欢迎访问ic37.com |
会员登录 免费注册
发布采购

LPC2214FBD144 参数 Datasheet PDF下载

LPC2214FBD144图片预览
型号: LPC2214FBD144
PDF下载: 下载PDF文件 查看货源
内容描述: 16位/ 32位ARM微控制器; 128/256 KB ISP / IAP闪存与10位ADC和外部存储器接口 [16/32-bit ARM microcontrollers; 128/256 kB ISP/IAP flash with 10-bit ADC and external memory interface]
分类和应用: 闪存存储微控制器和处理器外围集成电路时钟
文件页数/大小: 45 页 / 197 K
品牌: PHILIPS [ NXP SEMICONDUCTORS ]
 浏览型号LPC2214FBD144的Datasheet PDF文件第5页浏览型号LPC2214FBD144的Datasheet PDF文件第6页浏览型号LPC2214FBD144的Datasheet PDF文件第7页浏览型号LPC2214FBD144的Datasheet PDF文件第8页浏览型号LPC2214FBD144的Datasheet PDF文件第10页浏览型号LPC2214FBD144的Datasheet PDF文件第11页浏览型号LPC2214FBD144的Datasheet PDF文件第12页浏览型号LPC2214FBD144的Datasheet PDF文件第13页  
NXP Semiconductors
LPC2212/2214
16/32-bit ARM microcontrollers
Table 3.
Symbol
P2[7]/D7
P2[8]/D8
P2[9]/D9
P2[10]/D10
P2[11]/D11
P2[12]/D12
P2[13]/D13
P2[14]/D14
P2[15]/D15
P2[16]/D16
P2[17]/D17
P2[18]/D18
P2[19]/D19
P2[20]/D20
P2[21]/D21
P2[22]/D22
P2[23]/D23
P2[24]/D24
P2[25]/D25
Pin description
…continued
Pin
116
117
118
120
124
125
127
129
130
131
132
133
134
136
137
1
10
11
12
13
Type Description
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
External memory data line 7.
External memory data line 8.
External memory data line 9.
External memory data line 10.
External memory data line 11.
External memory data line 12.
External memory data line 13.
External memory data line 14.
External memory data line 15.
External memory data line 16.
External memory data line 17.
External memory data line 18.
External memory data line 19.
External memory data line 20.
External memory data line 21.
External memory data line 22.
External memory data line 23.
External memory data line 24.
External memory data line 25.
D26 —
External memory data line 26.
BOOT0 —
While RESET is LOW, together with BOOT1 controls booting and
internal operation. Internal pull-up ensures HIGH state if pin is left
unconnected.
D27 —
External memory data line 27.
BOOT1 —
While RESET is LOW, together with BOOT0 controls booting and
internal operation. Internal pull-up ensures HIGH state if pin is left
unconnected.
BOOT1:0 = 00 selects 8-bit memory on CS0 for boot.
BOOT1:0 = 01 selects 16-bit memory on CS0 for boot.
BOOT1:0 = 10 selects 32-bit memory on CS0 for boot.
BOOT1:0 = 11 selects internal flash memory.
P2[26]/D26/BOOT0
P2[27]/D27/BOOT1
16
I/O
I
P2[28]/D28
P2[29]/D29
P2[30]/D30/AIN4
P2[31]/D31/AIN5
P3[0] to P3[31]
17
18
19
20
I/O
I/O
I/O
I
I/O
I
I/O
External memory data line 28.
External memory data line 29.
D30 —
External memory data line 30.
AIN4 —
ADC, input 4. This analog input is always connected to its pin.
D31 —
External memory data line 31.
AIN5 —
ADC, input 5. This analog input is always connected to its pin.
Port 3 is a 32-bit bidirectional I/O port with individual direction controls for
each bit. The operation of port 3 pins depends upon the pin function selected
via the Pin Connect Block.
External memory address line 0.
External memory address line 1.
External memory address line 2.
© NXP B.V. 2008. All rights reserved.
P3[0]/A0
P3[1]/A1
P3[2]/A2
LPC2212_2214_4
89
88
87
O
O
O
Product data sheet
Rev. 04 — 3 January 2008
9 of 45