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LPC2214FBD144 参数 Datasheet PDF下载

LPC2214FBD144图片预览
型号: LPC2214FBD144
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片16位/ 32位ARM微控制器; 128/256 KB ISP / IAP闪存与10位ADC [Single-chip 16/32-bit ARM microcontrollers; 128/256 kB ISP/IAP flash with 10-bit ADC]
分类和应用: 闪存微控制器和处理器外围集成电路时钟
文件页数/大小: 47 页 / 322 K
品牌: PHILIPS [ NXP SEMICONDUCTORS ]
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LPC2212/2214
Single-chip 16/32-bit ARM microcontrollers; 128/256 kB
ISP/IAP flash with 10-bit ADC and external memory interface
Rev. 5 — 14 June 2011
Product data sheet
1. General description
The LPC2212/2214 are based on a 16/32-bit ARM7TDMI-S CPU with real-time emulation
and embedded trace support, together with 128/256 kB of embedded high-speed flash
memory. A 128-bit wide memory interface and a unique accelerator architecture enable
32-bit code execution at maximum clock rate. For critical code size applications, the
alternative 16-bit Thumb mode reduces code by more than 30 % with minimal
performance penalty.
With their 144-pin package, low power consumption, various 32-bit timers, 8-channel
10-bit ADC, PWM channels and up to nine external interrupt pins these microcontrollers
are particularly suitable for industrial control, medical systems, access control and
point-of-sale. Number of available fast GPIOs ranges from up to 76 pins (with external
memory) through up to 112 pins (single-chip). With a wide range of serial communications
interfaces, they are also very well suited for communication gateways, protocol converters
and embedded soft modems as well as many other general-purpose applications.
Remark:
Throughout the data sheet, the term LPC2212/2214 will apply to devices with
and without the /00 or /01 suffixes. The /00 or the /01 suffix will be used to differentiate
from other devices only when necessary.
2. Features and benefits
2.1 Key features brought by LPC2212/2214/01 devices
Fast GPIO ports enable port pin toggling up to 3.5 times faster than the original device.
They also allow for a port pin to be read at any time regardless of its function.
Dedicated result registers for ADC(s) reduce interrupt overhead. The ADC pads are
5 V tolerant when configured for digital I/O function(s).
UART0/1 include fractional baud rate generator, auto-bauding capabilities and
handshake flow-control fully implemented in hardware.
Buffered SSP serial controller supporting SPI, 4-wire SSI, and Microwire formats.
SPI programmable data length and master mode enhancement.
Diversified Code Read Protection (CRP) enables different security levels to be
implemented. This feature is available in LPC2212/2214/00 devices as well.
General purpose timers can operate as external event counters.
2.2 Key features common for all devices
16/32-bit ARM7TDMI-S microcontroller in a LQFP144 package.