LPC2131/32/34/36/38
Single-chip 16/32-bit microcontrollers; 32/64/128/256/512 kB
ISP/IAP flash with 10-bit ADC and DAC
Rev. 04 — 16 October 2007
Product data sheet
1. General description
The LPC2131/32/34/36/38 microcontrollers are based on a 16/32-bit ARM7TDMI-S CPU
with real-time emulation and embedded trace support, that combine the microcontroller
with 32 kB, 64 kB, 128 kB, 256 kB and 512 kB of embedded high-speed flash memory. A
128-bit wide memory interface and a unique accelerator architecture enable 32-bit code
execution at maximum clock rate. For critical code size applications, the alternative 16-bit
Thumb mode reduces code by more than 30 % with minimal performance penalty.
Due to their tiny size and low power consumption, these microcontrollers are ideal for
applications where miniaturization is a key requirement, such as access control and
point-of-sale. With a wide range of serial communications interfaces and on-chip SRAM
options of 8 kB, 16 kB, and 32 kB, they are very well suited for communication gateways
and protocol converters, soft modems, voice recognition and low-end imaging, providing
both large buffer size and high processing power. Various 32-bit timers, single or dual
10-bit 8-channel ADC(s), 10-bit DAC, PWM channels and 47 GPIO lines with up to nine
edge or level sensitive external interrupt pins make these microcontrollers particularly
suitable for industrial control and medical systems.
2. Features
2.1 Enhancements brought by LPC213x/01 devices
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Fast GPIO ports enable port pin toggling up to 3.5 times faster than the original
LPC213x. They also allow for a port pin to be read at any time regardless of its
function.
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Dedicated result registers for ADC(s) reduce interrupt overhead.
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UART0/1 include fractional baud rate generator, auto-bauding capabilities and
handshake flow-control fully implemented in hardware.
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Additional BOD control enables further reduction of power consumption.
2.2 Key features common for LPC213x and LPC213x/01
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16/32-bit ARM7TDMI-S microcontroller in a tiny LQFP64 or HVQFN package.
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8/16/32 kB of on-chip static RAM and 32/64/128/256/512 kB of on-chip flash program
memory. 128-bit wide interface/accelerator enables high-speed 60 MHz operation.
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In-System Programming/In-Application Programming (ISP/IAP) via on-chip bootloader
software. Single flash sector or full chip erase in 400 ms and programming of 256 B in
1 ms.
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EmbeddedICE RT and Embedded Trace interfaces offer real-time debugging with the
on-chip RealMonitor software and high-speed tracing of instruction execution.
PHILIPS [ NXP SEMICONDUCTORS ]
