Unique LPC peripherals
For a simpler, faster, more efficient design
We start with optimized versions of the basic ARM architectures. Then we add special functional and
peripheral interfaces that simplify design, improve performance, and save power. The result is a set of
features that truly sets us apart.
This section highlights the LPC features available with our Cortex-M devices. For more specific details on
the Cortex-M features, or to see the features available with the LPC devices based on ARM7 and ARM9,
please refer to our product datasheets.
LPC features available for Cortex-M devices
LPC Go
LPC Connect
LPC ConnectPlus
LPC ConnectTurbo
SWITCH MATRIX
STATE-CONFIGURABLE TIMER (SCT)
SPECIAL FUNCTIONS IN ROM
USB 2.0 HOST/DEVICE/OTG INTERFACE
CAN 2.0B INTERFACE
ETHERNET INTERFACE
QUAD SPI FLASH INTERFACE (SPIFI)
LCD DISPLAY INTERFACE
SERIAL GPIO (SGPIO)
DUAL-CORE (M4/M0) ARCHITECTURE
Switch matrix
The flexible switch matrix enables designers to configure on-chip peripherals any way they
want. Any peripheral can be assigned to any I/O pin — even on the fly. This creates enormous
flexibility in low-pin-count MCUs. What’s more, a GUI-based configuration tool makes it fast
and easy to build new layouts or edit existing ones.
State-configurable timer (SCT)
This patent-pending peripheral, developed by NXP, is a sophisticated yet easy-to-configure
timing function that delivers unprecedented flexibility. The SCT lets you configure a range of
timing operations — including those required for complex motor-control functions — while
meeting tight development schedules.
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NXP [ NXP ]
