HEF4027B
Dual JK flip-flop
Rev. 05 — 10 November 2008
Product data sheet
1. General description
The HEF4027B is a edge-triggered dual JK flip-flop which features independent set-direct
(SD), clear-direct (CD), clock (CP) inputs and outputs (Q, Q). Data is accepted when CP
is LOW, and transferred to the output on the positive-going edge of the clock. The active
HIGH asynchronous clear-direct (CD) and set-direct (SD) inputs are independent and
override the J, K, and CP inputs. The outputs are buffered for best system performance.
Schmitt trigger action makes the clock input highly tolerant of slower rise and fall times.
It operates over a recommended V
DD
power supply range of 3 V to 15 V referenced to V
SS
(usually ground). Unused inputs must be connected to V
DD
, V
SS
, or another input. It is
also suitable for use over the full industrial (−40
°C
to +85
°C)
temperature range.
2. Features
I
I
I
I
I
I
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Operates across the full industrial temperature range
−40 °C
to +85
°C
Complies with JEDEC standard JESD 13-B
ESD protection:
N
HBM JESD22-A114E exceeds 2000 V
N
MM JESD22-A115-A exceeds 200 V
3. Applications
I
Registers
I
Counters
I
Control circuits
4. Ordering information
Table 1.
Ordering information
T
amb
from
−
40
°
C to +85
°
C.
Type number
HEF4027BP
HEF4027BT
Package
Name
DIP16
SO16
Description
plastic dual in-line package; 16-leads (300 mil)
plastic small outline package; 16 leads; body width 3.9 mm
Version
SOT38-4
SOT109-1
PHILIPS [ NXP SEMICONDUCTORS ]
