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HEF4021BT 参数 Datasheet PDF下载

HEF4021BT图片预览
型号: HEF4021BT
PDF下载: 下载PDF文件 查看货源
内容描述: 8位的静态移位寄存器 [8-bit static shift register]
分类和应用: 移位寄存器触发器逻辑集成电路光电二极管输出元件
文件页数/大小: 14 页 / 89 K
品牌: PHILIPS [ NXP SEMICONDUCTORS ]
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HEF4021B
8-bit static shift register
Rev. 04 — 10 November 2008
Product data sheet
1. General description
The HEF4021B is an 8-bit static shift register (parallel-to-serial converter) with a
synchronous serial data input (DS), a clock input (CP), an asynchronous active HIGH
parallel load input (PL), eight asynchronous parallel data inputs (D0 to D7) and buffered
parallel outputs from the last three stages (Q5 to Q7).
Each register stage is a D-type master-slave flip-flop with a set direct (SD) and clear direct
(CD) input. Information on D0 to D7 is asynchronously loaded into the register while PL is
HIGH, independent of CP and DS. When PL is LOW, data on DS is shifted into the first
register position and all the data in the register is shifted one position to the right on the
LOW-to-HIGH transition of CP. Schmitt trigger action makes the clock input highly tolerant
of slower rise and fall times.
It operates over a recommended V
DD
power supply range of 3 V to 15 V referenced to V
SS
(usually ground). Unused inputs must be connected to V
DD
, V
SS
, or another input. It is
also suitable for use over both the industrial (−40
°C
to +85
°C)
and automotive (−40
°C
to
+125
°C)
temperature ranges.
2. Features
I
I
I
I
I
I
I
Tolerant of slower rise and fall times
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Operates across the automotive temperature range
−40 °C
to +125
°C
Complies with JEDEC standard JESD 13-B
ESD protection:
N
HBM JESD22-A114E exceeds 2000 V
N
MM JESD22-A115-A exceeds 200 V
3. Applications
I
Industrial and automotive