NXP Semiconductors
FXTH87E
FXTH87E, Family of Tire Pressure Monitor Sensors
the features and functions of the TPM1 are as described in the MC9S08RC16 product
specification. The user has the option to connect the two timer channels to the PTA[3:2]
pins, if those pins are not needed for an LFR channel or other general purpose I/O
function. The following clock source and frequency selections are available using the
system option register 2 as shown in Table 41 and Table 42.
In addition one channel of the TPM1 can be connected to a 500 kHz clock (DX) derived
from the crystal oscillator on the RFM. This selection is made by setting the TPM1 to use
an external clock. This clock source allows time calibration of the LFO as described in the
Section 16 "Firmware".
11.1 Features
The TPM1 has the following features:
• May be configured for buffered, center-aligned pulse-width modulation (CPWM) on all
channels
• Clock sources independently selectable
• Selectable clock sources (device dependent): bus clock, fixed system clock
• Clock prescaler taps for divide by 1, 2, 4, 8, 16, 32, 64, or 128
• 16-bit free-running or up/down (CPWM) count operation
• 16-bit modulus register to control counter range
• Timer system enable
• One interrupt per channel plus a terminal count interrupt
• Channel features:
– Each channel may be input capture, output compare, or buffered edge-aligned PWM
– Rising-edge, falling-edge, or any-edge input capture trigger
– Set, clear, or toggle output compare action
– Selectable polarity on PWM outputs
11.2 TPM1 configuration information
The device provides one two-channel timer/pulse-width modulator (TPM1).
An easy way to measure the low frequency oscillator (LFO) is to connect the LFO directly
to TPM1 channel 0. The LFOSEL bit in the SOPTZ determines whether TPM1CH0 is
connected to PTAZ or the LFO.
TPM1 clock source selection for the TPM1 is shown in the following table.
Table 78.ꢀTPM1 clock source selection
CLKSB
CLKSA
Clock Source
No source; TPM1 disabled
BUSCLK
0
0
1
1
0
1
0
1
unused
Internal DX pin
11.2.1 Block diagram
Figure 18 shows the structure of a TPM1.
FXTH87ERM
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© NXP B.V. 2019. All rights reserved.
Reference manual
Rev. 5.0 — 4 February 2019
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