NXP Semiconductors
FXTH87E
FXTH87E, Family of Tire Pressure Monitor Sensors
10.6 HCS08 instruction set summary
10.6.1 Instruction set summary nomenclature
The nomenclature listed here is used in the instruction descriptions in Table 75.
10.6.2 Operators
( ) = Contents of register or memory location shown inside parentheses
← = Is loaded with (read: "gets")
& = Boolean AND
|
= Boolean OR
= Boolean exclusive-OR
⊕
× = Multiply
÷ = Divide
:
= Concatenate
+ = Add
– = Negate (two’s complement)
10.6.3 CPU registers
A
= Accumulator
CCR = Condition code register
H
X
= Index register, higher order (most significant) 8 bits
= Index register, lower order (least significant) 8 bits
PC = Program counter
PCH = Program counter, higher order (most significant) 8 bits
PCL = Program counter, lower order (least significant) 8 bits
SP
= Stack pointer
10.6.4 Memory and addressing
M = A memory location or absolute data, depending on addressing mode
M:M + 0x0001 = A 16-bit value in two consecutive memory locations. The higher-order
(most significant) 8 bits are located at the address of M, and the lower-order (least
significant) 8 bits are located at the next higher sequential address.
10.6.5 Condition code register (CCR) bits
V = Two’s complement overflow indicator, bit 7
H = Half carry, bit 4
I = Interrupt mask, bit 3
N = Negative indicator, bit 2
FXTH87ERM
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Reference manual
Rev. 5.0 — 4 February 2019
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