NXP Semiconductors
FXTH87E
FXTH87E, Family of Tire Pressure Monitor Sensors
Address
$0020-27
$0028
Register Name
LFR Registers
ADSC1
Bit 7
6
5
4
3
2
1
Bit 0
LFR Registers, see Table 8 and Table 9
ADCO ADCH[4:0]
COCO
ADACT
0
AIEN
ADTRG
0
$0029
ADSC2
ACFE
0
ADCFGT
0
0
0
0
0
$002A
$002B
$002C
$002D
$002E
$002F
ADRH
ADR[11:8]
ADRL
ADR[7:0]
ADCVH
0
0
0
0
ADCV[11:8]
ADCVL
ADCV[7:0]
ADLSMP
ADPC[7:0]
ADCFG
ADLPC
ADIV[1:0]
MODE[1:0]
ADICLK[1:0]
ADPCTL1
$0030-4F RFM Registers
$0050-8F Parameter Reg
RFM Registers, see Table 10 and Table 11
PARAM[63:0]
Note: Shaded bits are recommended to only be controlled by firmware or factory test.
= reserved
Table 8.ꢀLFR register summary - LPAGE = 0
Address
$0020
$0021
$0022
$0023
$0024
$0025
$0026
$0027
Register Name
LFCTL1
LFCTL2
LFCTL3
LFCTL4
LFS
Bit 7
6
5
4
3
2
1
Bit 0
SENS[1:0]
LFEN
SRES
CARMOD
LPAGE
IDSEL[1:0]
LFSTM[3:0]
LFONTM[3:0]
LFCDTM[3:0]
VALEN TIMOUT[1:0]
LFDO
LFDRIE
LFDRF
TOGMOD
LFERIE
LFERF
SYNC[1:0]
LFCDIE
LFCDF
LFIDIE
LFIDF
DECEN
LFOVF
LFEOMF
LPSM
LFIAK
LFDATA
LFIDL
RXDATA[7:0]
ID[7:0]
LFIDH
ID[15:8]
Table 9.ꢀLFR register summary - LPAGE = 1
Address
$0020
$0021
$0022
$0023
$0024
$0025
$0026
$0027
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
LFCTL1
LFEN
SRES
CARMOD
LPAGE
IDSEL[1:0]
TRIMEE
SENS[1:0]
AZSC[2:0]
CHK125[1:0]
DEQEN
LFCTRLE
LFCTRLD
LFCTRLC
LFCTRLB
LFCTRLA
Reserved
Reserved
AVFOF[1:0]
DEQS
AZDC[1:0]
ONMODE
AMPGAIN[1:0]
HYST[1:0]
FINSEL[1:0]
AZEN
LOWQ[1:0]
LFCPTAZ[2:0]
LFCC[3:0]
LFFAF
TESTSEL[3:0]
LFCAF
LFPOL
Note: Shaded bits are recommended to only be controlled by firmware or factory test.
FXTH87ERM
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© NXP B.V. 2019. All rights reserved.
Reference manual
Rev. 5.0 — 4 February 2019
20 / 183
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