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F87EHHD 参数 Datasheet PDF下载

F87EHHD图片预览
型号: F87EHHD
PDF下载: 下载PDF文件 查看货源
内容描述: [FXTH87E, Family of Tire Pressure Monitor Sensors]
分类和应用:
文件页数/大小: 183 页 / 1700 K
品牌: NXP [ NXP ]
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NXP Semiconductors  
FXTH87E  
FXTH87E, Family of Tire Pressure Monitor Sensors  
divided into two pages of 128 bits as selected by the RPAGE bit in the RFCR2. These as  
described in Table 159. These bits are unaffected by any reset.  
The data buffer is unloaded to the RF output starting with the least significant bit (RFD0)  
in the least significant byte (RFB0) up through the most significant bit (RFD255) in the  
most significant byte (RFB31). This is often referred to as "little-endian" data ordering.  
The output of this data by the RFM in all 256 bits locations is not dependent on the state  
of the RPAGE bit.  
Table 159.ꢀRF data registers (RFD[31:0])  
Bit 7  
6
5
4
3
2
1
Bit 0  
$003C  
$003D  
$003E  
$003F  
$0040  
$0041  
$0042  
$0043  
$0044  
$0045  
$0046  
$0047  
$0048  
$0049  
$004A  
$004B  
RFD[7:0] for RPAGE = 0, RFD[135:128] for RPAGE = 1  
RFD[15:8] for RPAGE = 0, RFD[143:136] for RPAGE = 1  
RFD[23:16] for RPAGE = 0, RFD[151:144] for RPAGE = 1  
RFD[31:24] for RPAGE = 0, RFD[159:152] for RPAGE = 1  
RFD[39:32] for RPAGE = 0, RFD[167:160] for RPAGE = 1  
RFD[47:40] for RPAGE = 0, RFD[175:168] for RPAGE = 1  
RFD[55:48] for RPAGE = 0, RFD[183:176] for RPAGE = 1  
RFD[63:56] for RPAGE = 0, RFD[191:184] for RPAGE = 1  
RFD[71:64] for RPAGE = 0, RFD[199:192] for RPAGE = 1  
RFD[79:72] for RPAGE = 0, RFD[207:200] for RPAGE = 1  
RFD[87:80] for RPAGE = 0, RFD[215:208] for RPAGE = 1  
RFD[95:88] for RPAGE = 0, RFD[223:216] for RPAGE = 1  
RFD[103:96] for RPAGE = 0, RFD[231:224] for RPAGE = 1  
RFD[111:104] for RPAGE = 0, RFD[239:232] for RPAGE = 1  
RFD[119:112] for RPAGE = 0, RFD[247:240] for RPAGE = 1  
RFD[127:120] for RPAGE = 0, RFD[255:248] for RPAGE = 1  
Table 160.ꢀRFD[31:0] field descriptions  
Field  
Description  
RFD[127:0]  
RF Data Registers Lower 128 bits — These are read/write bits that hold the lower 128 bits of possible  
data to be sent by the RFM. Access to the lower 128 bits occurs when the RPAGE bit is clear. These  
bits are unaffected by any reset.  
(RFD[15:0],  
RPAGE = 0)  
RFD[255:128]  
RF Data Registers Upper 128 bits — These are read/write bits that hold the upper 128 bits of  
possible data to be sent by the RFM. Access to the lower 128 bits occurs when the RPAGE bit is  
clear. These bits are unaffected by any reset.  
(RFD[31:16]  
, RPAGE = 1)  
15.21 VCO calibration machine  
The RFM incorporates a VCO calibration machine which works in conjunction with the  
VCO. The calibration machine selects the optimal VCO sub-band with respect to a  
predefined reference voltage applied to the VCO.  
Calibration supports maxband VCO sub-bands. Maxband corresponds to the band  
where the VCO frequency is maximum.  
FXTH87ERM  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2019. All rights reserved.  
Reference manual  
Rev. 5.0 — 4 February 2019  
155 / 183  
 
 
 
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