Philips Semiconductors
Product data
CMOS 8-bit A/D converters
ADC0803/0804
DC ELECTRICAL CHARACTERISTICS
V
CC
= 5.0 V, f
CLK
= 1 MHz, T
min
≤
T
amb
≤
T
max
, unless otherwise specified.
LIMITS
SYMBOL
PARAMETER
ADC0803 relative accuracy error (adjusted)
ADC0804 relative accuracy error (unadjusted)
R
IN
V
REF
/2 input resistance
3
Analog input voltage range
3
DC common-mode error
Power supply sensitivity
Control inputs
V
IH
V
IL
I
IH
I
IL
V
T
+
V
T
–
V
H
V
OL
V
OH
V
OL
Logical “1” input voltage
Logical “0” input voltage
Logical “1” input current
Logical “0” input current
V
CC
= 5.25 V
DC
V
CC
= 4.75 V
DC
V
IN
= 5 V
DC
V
IN
= 0 V
DC
–1
0.005
–0.005
2.0
15
0.8
1
V
DC
V
DC
µA
DC
µA
DC
3.5
2.1
2.0
0.4
2.4
V
DC
V
DC
V
DC
V
DC
V
DC
Over analog input voltage range
V
CC
= 5V
±10%
1
TEST CONDITIONS
Full-Scale adjusted
V
REF
/2 = 2.500 V
DC
V
CC
= 0 V
2
400
–0.05
1/16
1/16
680
V
CC
+0.05
1/8
Min
Typ
Max
0.50
1
UNIT
LSB
LSB
Ω
V
LSB
LSB
Clock in and clock R
Clock in positive-going threshold voltage
Clock in negative-going threshold voltage
Clock in hysteresis (V
T
+)–(V
T
–)
Logical “0” clock R output voltage
Logical “1” clock R output voltage
I
OL
= 360
µA,
V
CC
= 4.75 V
DC
I
OH
= –360
µA,
V
CC
= 4.75 V
DC
2.7
1.5
0.6
3.1
1.8
1.3
Data output and INTR
Logical “0” output voltage
Data outputs
INTR outputs
V
O
OH
I
OZL
I
OZH
I
SC
I
SC
I
CC
Logical “1” output voltage
3-State output leakage
3-State output leakage
+Output short-circuit current
–Output short-circuit current
Power supply current
I
OL
= 1.6 mA, V
CC
= 4.75 V
DC
I
OL
= 1.0 mA, V
CC
= 4.75 V
DC
I
OH
= –360
µA,
V
CC
= 4.75 V
DC
I
OH
= –10
µA,
V
CC
= 4.75 V
DC
V
OUT
= 0 V
DC
, CS = logical “1”
V
OUT
= 5 V
DC
, CS = logical “1”
V
OUT
= 0 V, T
amb
= 25
°C
V
OUT
= V
CC
, T
amb
= 25
°C
f
CLK
= 1 MHz, V
REF
/2 = OPEN,
CS = Logical “1”, T
amb
= 25
°C
4.5
9.0
12
30
3.0
3.5
2.4
4.5
–3
3
V
DC
C
µA
DC
µA
DC
mA
DC
mA
DC
mA
0.4
0.4
V
DC
V
DC
NOTES:
1. Analog inputs must remain within the range: –0.05
≤
V
IN
≤
V
CC
+ 0.05 V.
2. See typical performance characteristics for input resistance at V
CC
= 5 V.
3. V
REF
/2 and V
IN
must be applied after the V
CC
has been turned on to prevent the possibility of latching.
2002 Oct 17
4
PHILIPS [ NXP SEMICONDUCTORS ]
