NXP Semiconductors
74LVC244A; 74LVCH244A
Octal buffer/line driver; 3-state
5. Pinning information
5.1 Pinning
74LVC244A
74LVCH244A
1OE
2
3
4
5
6
7
8
9
GND 10
2A3 11
GND
(1)
1
1A0
2Y0
terminal 1
index area
74LVC244A
74LVCH244A
1OE
1A0
2Y0
1A1
2Y1
1A2
2Y2
1A3
2Y3
1
2
3
4
5
6
7
8
9
20 V
CC
19 2OE
18 1Y0
17 2A0
16 1Y1
15 2A1
14 1Y2
13 2A2
12 1Y3
11 2A3
001aad113
20 V
CC
19
2OE
18
1Y0
17
2A0
16
1Y1
15
2A1
14
1Y2
13
2A2
12
1Y3
1A1
2Y1
1A2
2Y2
1A3
2Y3
GND 10
001aad114
Transparent top view
(1) The die substrate is attached to this pad using
conductive die attach material. It can not be used as a
supply pin or input.
Fig 4.
Pin configuration for SO20 and (T)SSOP20
Fig 5.
Pin configuration for DHVQFN20 and
DHXQFN20U
5.2 Pin description
Table 2.
Symbol
1OE, 2OE
1A0, 1A1, 1A2, 1A3
2Y0, 2Y1, 2Y2, 2Y3
GND
2A0, 2A1, 2A2, 2A3
1Y0, 1Y1, 1Y2, 1Y3,
V
CC
Pin description
Pin
1, 19
2, 4, 6, 8
3, 5, 7, 9
10
Description
output enable input (active low)
data input
data output
ground (0 V)
17, 15, 13, 11 data input
18, 16, 14, 12 data output
20
supply voltage
74LVC_LVCH244A_6
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 06 — 13 August 2009
4 of 18
PHILIPS [ NXP SEMICONDUCTORS ]
