NXP Semiconductors
74LVC1G99
Ultra-configurable multiple function gate; 3-state
6. Pinning information
6.1 Pinning
74LVC1G99
OE
A
B
GND
1
2
3
4
001aah323
8
7
6
5
V
CC
Y
D
C
Fig 2. Pin configuration SOT505-2 (TSSOP8)
74LVC1G99
74LVC1G99
OE
1
8
V
CC
terminal 1
index area
Y
1
V
CC
8
7
OE
A
2
7
Y
D
2
6
A
B
3
6
D
C
3
4
5
B
GND
GND
4
5
C
001aah325
001aah324
Transparent top view
Transparent top view
Fig 3. Pin configuration SOT833-1 (XSON8)
Fig 4. Pin configuration SOT902-1 (XQFN8U)
6.2 Pin description
Table 3.
Symbol
Pin description
Pin
SOT505-2 and
SOT833-1
OE
A
B
GND
C
D
Y
V
CC
1
2
3
4
5
6
7
8
SOT902-1
7
6
5
4
3
2
1
8
output enable input OE (active LOW)
data input
data input
ground (0 V)
data input
data input
data output
supply voltage
Description
74LVC1G99_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 3 January 2008
3 of 26
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