NXP Semiconductors
74HC4052; 74HCT4052
Dual 4-channel analog multiplexer/demultiplexer
6. Pinning information
6.1 Pinning
74HC4052
74HCT4052
2Y0
2Y2
2Z
2Y3
2Y1
E
V
EE
GND
1
2
3
4
5
6
7
8
001aah822
74HC4052
74HCT4052
16 V
CC
15 1Y2
2Y2
14 1Y1
13 1Z
12 1Y0
11 1Y3
V
EE
10 S0
9
S1
7
8
GND
S1
9
2Z
2Y3
2Y1
E
2
3
4
5
6
V
CC(1)
terminal 1
index area
16 V
CC
15 1Y2
14 1Y1
13 1Z
12 1Y0
11 1Y3
10 S0
2Y0
1
001aah823
Transparent top view
(1) The die substrate is attached to this pad using
conductive die attach material. It can not be used as a
supply pin or input.
Fig 5.
Pin configuration for DIP16, SO16 and
(T)SSOP16
Fig 6.
Pin configuration for DHVQFN16
6.2 Pin description
Table 2.
Symbol
2Y0
2Y2
2Z
2Y3
2Y1
E
V
EE
GND
S1
S0
1Y3
1Y0
1Z
1Y1
1Y2
V
CC
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Description
independent input or output 2Y0
independent input or output 2Y2
common input or output 2
independent input or output 2Y3
independent input or output 2Y1
enable input (active LOW)
negative supply voltage
ground (0 V)
select logic input 1
select logic input 0
independent input or output 1Y3
independent input or output 1Y0
common input or output 1
independent input or output 1Y1
independent input or output 1Y2
positive supply voltage
74HC_HCT4052_6
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 06 — 11 January 2010
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