NXP Semiconductors
74HC238; 74HCT238
3-to-8 line decoder/demultiplexer
Y0
E1
E2
E3
Y1
Y2
Y3
Y4
Y5
A0
Y6
A1
A2
Y7
001aag754
Fig 3. Logic diagram
5. Pinning information
5.1 Pinning
74HC238
74HCT238
A0
A1
A2
E1
E2
E3
Y7
GND
1
2
3
4
5
6
7
8
001aag755
74HC238
74HCT238
16 V
CC
15 Y0
A1
14 Y1
13 Y2
12 Y3
11 Y4
10 Y5
9
Y6
A2
E1
E2
E3
Y7
2
3
4
5
6
7
8
GND
Y6
9
GND
(1)
terminal 1
index area
16 V
CC
15 Y0
14 Y1
13 Y2
12 Y3
11 Y4
10 Y5
A0
1
001aag756
Transparent top view
(1) The die substrate is attached to this pad using
conductive die attach material. It can not be used as
supply pin or input
Fig 4. Pin configuration DIP16, SO16, (T)SSOP16
Fig 5. Pin configuration DHVQFN16
74HC_HCT238_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 16 July 2007
3 of 18
PHILIPS [ NXP SEMICONDUCTORS ]
