NXP Semiconductors
74HC157; 74HCT157
Quad 2-input multiplexer
1
2
3
5
6
11
10
14
13
1I0
1I1
2I0
2Y
2I1
3I0
3I1
4I0
4I1
4Y 12
SELECTOR
MULTIPLEXER
OUTPUTS
7
1Y
4
15
G1
EN
2
3
1
1
MUX
4
3Y
9
5
6
11
10
14
7
9
S
1
E
15
mna483
13
mna482
12
Fig 3. Logic symbol
Fig 4. IEC logic symbol
5. Pinning information
5.1 Pinning
74HC157
74HCT157
terminal 1
index area
1I0
16 V
CC
15 E
14 4I0
13 4I1
12 4Y
11 3I0
10 3I1
9
001aan353
74HC157
74HCT157
S
1I0
1I1
1Y
2I0
2I1
2Y
GND
1
2
3
4
5
6
7
8
2
3
4
5
6
7
8
GND
3Y
9
GND
(1)
16 V
CC
15 E
14 4I0
13 4I1
12 4Y
11 3I0
10 3I1
1I1
1Y
2I0
2I1
2Y
1
S
3Y
001aan354
Transparent top view
(1)
This is not a supply pin. The substrate is attached to
this pad using conductive die attach material. There
is no electrical or mechanical requirement to solder
this pad. However, if it is soldered, the solder land
should remain floating or be connected to GND.
Fig 5.
Pin configuration DIP16, SO16, (T)SSOP16
Fig 6. Pin configuration DHVQFN16
74HC_HCT157
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 3 — 31 December 2010
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