NXP Semiconductors
74HC154; 74HCT154
4-to-16 line decoder/demultiplexer
5. Pinning information
5.1 Pinning
74HC154BQ
74HCT154BQ
terminal 1
index area
Y1
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
1
2
3
4
5
6
7
8
9
24 V
CC
23 A0
22 A1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
2
3
4
5
6
7
8
9
V
CC
GND 12
(1)
24 V
CC
23 A0
22 A1
21 A2
20 A3
19 E1
18 E0
17 Y15
16 Y14
15 Y13
14 Y12
Y11 13
74HC154D
74HCT154D
74HC154DB
74HCT154DB
74HC154N
74HCT154N
74HC154PW
74HCT154PW
21 A2
20 A3
19 E1
18 E0
17 Y15
16 Y14
15 Y13
14 Y12
13 Y11
Y9 10
Y10 11
Y9 10
Y10 11
GND 12
001aab067
1
Y0
001aab068
Transparent top view
(1) The die substrate is attached to this pad using
conductive die attach material. It cannot be used as
a supply pin or input.
Fig 5. Pin configuration for SO24, DIP24, SSOP24 and
TSSOP24
Fig 6. Pin configuration for DHVQFN24
5.2 Pin description
Table 2.
Symbol
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
Y9
Y10
GND
Y11
Y12
74HC_HCT154_6
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Description
data output (active LOW)
data output (active LOW)
data output (active LOW)
data output (active LOW)
data output (active LOW)
data output (active LOW)
data output (active LOW)
data output (active LOW)
data output (active LOW)
data output (active LOW)
data output (active LOW)
ground (0 V)
data output (active LOW)
data output (active LOW)
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 06 — 12 February 2007
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