74HC123; 74HCT123
NXP Semiconductors
Dual retriggerable monostable multivibrator with reset
Table 7.
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 12.
Symbol Parameter
Conditions
25 °C
−40 °C to +85 °C −40 °C to +125 °C Unit
Min Typ Max
Min
Max
Min
Max
tW
pulse width
VCC = 4.5 V
nA LOW; see Figure 10
nB HIGH; see Figure 10
nRD LOW; see Figure 11
nQ HIGH and nQ LOW;
20
20
20
3
5
7
-
-
-
25
25
25
-
-
-
30
30
30
-
-
-
ns
ns
ns
[2]
VCC = 5.0 V;
see Figure 10 and 11
CEXT = 100 nF;
-
-
-
450
75
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
µs
ns
ns
R
EXT = 10 kΩ
CEXT = 0 pF;
EXT = 5 kΩ
retrigger time nA, nB; CEXT = 0 pF;
EXT = 5 kΩ; VCC = 5.0 V;
R
[3][4]
trtrig
110
R
see Figure 10
REXT
CEXT
CPD
externaltiming VCC = 5.0 V; see Figure 7
resistor
2
-
-
-
1000
-
-
-
-
-
-
-
-
-
-
-
-
kΩ
pF
pF
[4]
[5]
externaltiming VCC = 5.0 V; see Figure 7
capacitor
-
-
power
dissipation
capacitance
per monostable;
VI = GND to VCC
-
56
[1] tpd is the same as tPHL and tPLH; tt is the same as tTHL and tTLH
[2] For other REXT and CEXT combinations see Figure 7. If CEXT > 10 nF, the next formula is valid.
tW = K × REXT × CEXT, where:
tW = typical output pulse width in ns;
REXT = external resistor in kΩ;
CEXT = external capacitor in pF;
K = constant = 0.45 for VCC = 5.0 V and 0.55 for VCC = 2.0 V.
The inherent test jig and pin capacitance at pins 15 and 7 (nREXT/CEXT) is approximately 7 pF.
[3] The time to retrigger the monostable multivibrator depends on the values of REXT and CEXT. The output pulse width will only be
extended when the time between the active-going edges of the trigger input pulses meets the minimum retrigger time. If CEXT >10 pF,
the next formula (at VCC = 5.0 V) for the setup time of a retrigger pulse is valid:
trtrig = 30 + 0.19 × REXT × CEXT0.9 + 13 × REXT1.05, where:
trtrig = retrigger time in ns;
CEXT = external capacitor in pF; REXT = external resistor in kΩ.
The inherent test jig and pin capacitance at pins 15 and 7 (nREXT/CEXT) is 7 pF.
[4] When the device is powered-up, initiate the device via a reset pulse, when CEXT < 50 pF.
[5] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi + ∑(CL × VCC2 × fo) + 0.75 × CEXT × VCC2 × fo + D × 16 × VCC where:
fi = input frequency in MHz;
fo = output frequency in MHz;
D = duty factor in %;
CL = output load capacitance in pF;
VCC = supply voltage in V;
CEXT = timing capacitance in pF;
∑(CL × VCC2 × fo) sum of outputs.
74HC_HCT123_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 13 July 2009
10 of 24
NXP [ NXP ]
