NAND128-A, NAND256-A
Description
For information on how to order these options refer to Table 23: Ordering information
scheme. Devices are shipped from the factory with block 0 always valid and the memory
content bits in valid blocks erased to ’1’.
See Table 2 for all the devices available in the family.
Table 2.
Product description
Timings
32 pages
x 1024
blocks
128
Mbits
512+16 16K+51
bytes 2 bytes
NAND128-A
NAND128W3A
x8
TSOP48
512+16 16K+51
bytes 2 bytes
2.7 to 3.6V 12 µs
50 ns
200 µs
2 ms
NAND256W3A
NAND256W4A
x8
32 pages
x 2048
blocks
256
Mbits
TSOP48
VFBGA55
(1)
NAND256-A
256+8 8K+256
words words
x16
1. x16 organization only available for MCP.
Figure 1.
Logic diagram
V
DD
I/O8-I/O15, x16
E
I/O0-I/O7, x8/x16
R
W
NAND flash
RB
AL
CL
WP
V
SS
AI07557C
7/58
NUMONYX [ NUMONYX B.V ]
