Command interface state tables
M58LT256JST, M58LT256JSB
(1)
Table 45. Command interface states - modify table, next state (continued)
Command Input
Erase
Confirm
P/E Resume,
Read
Buffer
Clear
Status
Buffer
Block
Read
Status
Register
Electronic
Signature
, Read
CFI Query
(90h, 98h)
Blank
Check
setup
(BCh)
Blank Program,
Check Program/
confirm Erase
(CBh) Suspend
(B0h)
Current CI State
Program
Setup
(10/40h)
BEFP
Setup
(3)(4)
Block
Unprotect
confirm,
BEFP
Read
Array
(FFh)
Program Erase,
(3)(4)
(2)
Register
(3)(4)
Setup
(20h)
(5)
(80h)
(E8h)
(70h)
(50h)
(3)(4)
Confirm
(D0h)
Blank
Check
busy
Setup
Blank
Check
Ready (error)
Ready (error)
Busy
Blank Check busy
Protect/CR Setup
in Erase Suspend
Erase
Suspend
Erase Suspend (Protect Error)
Ready (error)
Erase Suspend (Protect Error)
Ready (error)
Setup
Buffer
BEFP Busy
EFP
(6)
Busy
BEFP Busy
1. CI = Command Interface, CR = Configuration register, BEFP = Buffer Enhanced Factory program, P/E C = Program/Erase
controller, IS = Illegal State, BP = Buffer Program, ES = Erase Suspend.
2. At Power-up, all banks are in. Issuing a Read Array command to a busy bank, results in undetermined data output.
3. The two cycle command should be issued to the same bank address.
4. If the P/E C is active, both cycles are ignored.
5. The Clear Status Register command clears the SR error bits except when the P/E C. is busy or suspended.
6. BEFP is allowed only when Status Register bit SR0 is reset to '0'. BEFP is busy if Block Address is first BEFP Address. Any
other commands are treated as data.
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