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M58LT128HSB8ZA6E 参数 Datasheet PDF下载

M58LT128HSB8ZA6E图片预览
型号: M58LT128HSB8ZA6E
PDF下载: 下载PDF文件 查看货源
内容描述: 128兆位(8 MB 】 16 ,多银行,多接口,突发) 1.8 V电源供电,安全闪存 [128 Mbit (8 Mb 】16, multiple bank, multilevel interface, burst) 1.8 V supply, secure Flash memories]
分类和应用: 闪存存储内存集成电路
文件页数/大小: 110 页 / 2025 K
品牌: NUMONYX [ NUMONYX B.V ]
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Command Interface state tables  
M58LT128HST, M58LT128HSB  
(1)  
Table 41. Command Interface states - modify table, next state (continued)  
Command Input  
Erase  
Confirm  
P/E Resume,  
Read  
Buffer  
Clear  
Status  
Buffer  
Block  
Read  
Status  
Register  
Electronic  
Signature  
, Read  
CFI Query  
(90h, 98h)  
Blank  
Check  
setup  
(BCh)  
Blank Program,  
Check Program/  
confirm Erase  
(CBh) Suspend  
(B0h)  
Current CI State  
Program  
Setup  
(10/40h)  
BEFP  
Setup  
(3)(4)  
Block  
Unprotect  
confirm,  
BEFP  
Read  
Array  
(FFh)  
Program Erase,  
(3)(4)  
(2)  
Register  
(3)(4)  
Setup  
(20h)  
(5)  
(80h)  
(E8h)  
(70h)  
(50h)  
(3)(4)  
Confirm  
(D0h)  
Blank  
Check  
busy  
Setup  
Ready (error)  
Ready (error)  
Blank  
Check  
Blank IS in Blank Blank  
IS in Blank Check  
busy  
Busy  
Check  
busy  
Check  
busy  
Check  
busy  
Blank Check busy  
Protect/CR Setup  
in Erase Suspend  
Erase  
Suspend  
Erase Suspend (Protect Error)  
Ready (error)  
Erase Suspend (Protect Error)  
Ready (error)  
Setup  
Buffer  
BEFP Busy  
(6)  
EFP  
Busy  
BEFP Busy  
1. CI = Command Interface, CR = Configuration register, BEFP = Buffer Enhanced Factory program, P/E C = Program/Erase  
controller, IS = Illegal State, BP = Buffer Program, ES = Erase Suspend.  
2. At power-up, all banks are in Read Array mode. Issuing a Read Array command to a busy bank, results in undetermined  
data output.  
3. The two cycle command should be issued to the same bank address.  
4. If the Program/Erase Controller is active, both cycles are ignored.  
5. The Clear Status Register command clears the SR error bits except when the Program/Erase Controller is busy or  
suspended.  
6. BEFP is allowed only when Status Register bit SR0 is reset to '0'. BEFP is busy if block address is first BEFP address. Any  
other commands are treated as data.  
102/110  
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