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M29W800DB70N1F 参数 Datasheet PDF下载

M29W800DB70N1F图片预览
型号: M29W800DB70N1F
PDF下载: 下载PDF文件 查看货源
内容描述: 8兆位( 1兆位×8或512千位×16 ,引导块) 3 V电源快闪记忆体 [8-Mbit (1 Mbit x 8 or 512 Kbits x 16, boot block) 3 V supply flash memory]
分类和应用: 闪存内存集成电路光电二极管
文件页数/大小: 52 页 / 1105 K
品牌: NUMONYX [ NUMONYX B.V ]
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M29W800DT, M29W800DB  
Signal descriptions  
2.7  
2.8  
Write enable (W)  
The write enable, W, controls the bus write operation of the memory’s command interface.  
Reset/block temporary unprotect (RP)  
The reset/block temporary unprotect pin can be used to apply a hardware reset to the  
memory or to temporarily unprotect all blocks that have been protected.  
A hardware reset is achieved by holding reset/block temporary unprotect Low, V , for at  
IL  
least t  
. After reset/block temporary unprotect goes High, V , the memory will be ready  
PLPX  
IH  
for bus read and bus write operations after t  
or t  
, whichever occurs last. See the  
PHEL  
RHEL  
Section 2.9: Ready/busy output (RB), Table 15: Reset/block temporary unprotect AC  
characteristics and Figure 14: Reset/block temporary unprotect AC waveforms, for more  
details.  
Holding RP at V will temporarily unprotect the protected blocks in the memory. Program  
ID  
and erase operations on all blocks will be possible. The transition from V to V must be  
IH  
ID  
slower than t  
.
PHPHH  
2.9  
Ready/busy output (RB)  
The ready/busy pin is an open-drain output that can be used to identify when the device is  
performing a program or erase operation. During program or erase operations ready/busy is  
Low, V . Ready/busy is high-impedance during read mode, auto select mode and erase  
OL  
suspend mode.  
After a hardware reset, bus read and bus write operations cannot begin until ready/busy  
becomes high-impedance. See Table 15: Reset/block temporary unprotect AC  
characteristics and Figure 14: Reset/block temporary unprotect AC waveforms.  
The use of an open-drain output allows the ready/busy pins from several memories to be  
connected to a single pull-up resistor. A Low will then indicate that one, or more, of the  
memories is busy.  
2.10  
2.11  
Byte/word organization select (BYTE)  
The byte/word organization select pin is used to switch between the 8-bit and 16-bit bus  
modes of the memory. When byte/word organization select is Low, V , the memory is in 8-  
IL  
bit mode, when it is High, V , the memory is in 16-bit mode.  
IH  
VCC supply voltage  
The V supply voltage supplies the power for all operations (read, program, erase etc.).  
CC  
The command interface is disabled when the V supply voltage is less than the lockout  
CC  
voltage, V  
. This prevents bus write operations from accidentally damaging the data  
LKO  
during power-up, power-down and power surges. If the program/erase controller is  
programming or erasing during this time then the operation aborts and the memory contents  
being altered will be invalid.  
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