M29W400DT, M29W400DB
Figure 1. Logic diagram
Description
V
CC
18
15
A0-A17
DQ0-DQ14
W
E
DQ15A–1
BYTE
RB
M29W400DT
M29W400DB
G
RP
V
SS
AI06853
Table 1.
Signal names
Signal name
Function
Direction
A0-A17
DQ0-DQ7
DQ8-DQ14
DQ15A–1
E
Address inputs
Inputs
I/O
Data inputs/outputs
Data inputs/outputs
Data input/output or Address input
Chip Enable
I/O
I/O
Input
Input
Input
Input
Output
Output
G
Output Enable
W
Write Enable
RP
Reset/Block Temporary Unprotect
Ready/Busy output
Byte/word organization select
Supply voltage
RB
BYTE
VCC
VSS
Ground
NC
Not connected internally
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