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M28W160CB100N6T 参数 Datasheet PDF下载

M28W160CB100N6T图片预览
型号: M28W160CB100N6T
PDF下载: 下载PDF文件 查看货源
内容描述: 16兆位( 1Mb的X16 ,引导块) 3V供应闪存 [16 Mbit (1Mb x16, Boot Block) 3V Supply Flash Memory]
分类和应用: 闪存存储内存集成电路光电二极管
文件页数/大小: 50 页 / 1298 K
品牌: NUMONYX [ NUMONYX B.V ]
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M28W160CT, M28W160CB  
COMMAND INTERFACE  
All Bus Write operations to the memory are inter-  
preted by the Command Interface. Commands  
consist of one or more sequential Bus Write oper-  
ations. An internal Program/Erase Controller han-  
dles all timings and verifies the correct execution  
of the Program and Erase commands. The Pro-  
gram/Erase Controller provides a Status Register  
whose output may be read at any time during, to  
monitor the progress of the operation, or the Pro-  
gram/Erase states. See Appendix 21, Table 32,  
Write State Machine Current/Next, for a summary  
of the Command Interface.  
cations to automatically match their interface to  
the characteristics of the device. One Bus Write  
cycle is required to issue the Read Query Com-  
mand. Once the command is issued subsequent  
Bus Read operations read from the Common  
Flash Interface Memory Area. See Appendix B,  
Common Flash Interface, Tables 26, 27, 28, 29,  
30 and 31 for details on the information contained  
in the Common Flash Interface memory area.  
Block Erase Command  
The Block Erase command can be used to erase  
a block. It sets all the bits within the selected block  
to ’1’. All previous data in the block is lost. If the  
block is protected then the Erase operation will  
abort, the data in the block will not be changed and  
the Status Register will output the error.  
Two Bus Write cycles are required to issue the  
command.  
The first bus cycle sets up the Erase command.  
The second latches the block address in the  
internal state machine and starts the Program/  
Erase Controller.  
If the second bus cycle is not Write Erase Confirm  
(D0h), Status Register bits b4 and b5 are set and  
the command aborts.  
The Command Interface is reset to Read mode  
when power is first applied, when exiting from Re-  
set or whenever V  
is lower than V  
. Com-  
LKO  
DD  
mand sequences must be followed exactly. Any  
invalid combination of commands will reset the de-  
vice to Read mode. Refer to Table 4, Commands,  
in conjunction with the text descriptions below.  
Read Memory Array Command  
The Read command returns the memory to its  
Read mode. One Bus Write cycle is required to is-  
sue the Read Memory Array command and return  
the memory to Read mode. Subsequent read op-  
erations will read the addressed location and out-  
put the data. When a device Reset occurs, the  
memory defaults to Read mode.  
Erase aborts if Reset turns to V . As data integrity  
IL  
cannot be guaranteed when the Erase operation is  
Read Status Register Command  
aborted, the block must be erased again.  
The Status Register indicates when a program or  
erase operation is complete and the success or  
failure of the operation itself. Issue a Read Status  
Register command to read the Status Register’s  
contents. Subsequent Bus Read operations read  
the Status Register at any address, until another  
command is issued. See Table 11, Status Register  
Bits, for details on the definitions of the bits.  
The Read Status Register command may be is-  
sued at any time, even during a Program/Erase  
operation. Any Read attempt during a Program/  
Erase operation will automatically output the con-  
tent of the Status Register.  
During Erase operations the memory will accept  
the Read Status Register command and the Pro-  
gram/Erase Suspend command, all other com-  
mands will be ignored. Typical Erase times are  
given in Table 8, Program, Erase Times and Pro-  
gram/Erase Endurance Cycles.  
See Appendix C, Figure 20, Erase Flowchart and  
Pseudo Code, for a suggested flowchart for using  
the Erase command.  
Program Command  
The memory array can be programmed word-by-  
word. Two bus write cycles are required to issue  
the Program Command.  
Read Electronic Signature Command  
The Read Electronic Signature command reads  
the Manufacturer and Device Codes and the Block  
Locking Status, or the Protection Register.  
The Read Electronic Signature command consists  
of one write cycle, a subsequent read will output  
the Manufacturer Code, the Device Code, the  
Block Lock and Lock-Down Status, or the Protec-  
tion and Lock Register. See Tables 5, 6 and 7 for  
the valid address.  
The first bus cycle sets up the Program  
command.  
The second latches the Address and the Data to  
be written and starts the Program/Erase  
Controller.  
During Program operations the memory will ac-  
cept the Read Status Register command and the  
Program/Erase Suspend command. Typical Pro-  
gram times are given in Table 8, Program, Erase  
Times and Program/Erase Endurance Cycles.  
Read CFI Query Command  
The Read Query Command is used to read data  
from the Common Flash Interface (CFI) Memory  
Area, allowing programming equipment or appli-  
Programming aborts if Reset goes to V . As data  
IL  
integrity cannot be guaranteed when the program  
operation is aborted, the block containing the  
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