M25PX64
Instructions
6.2
Write disable (WRDI)
The write disable (WRDI) instruction (Figure 9) resets the write enable latch (WEL) bit.
The write disable (WRDI) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
The write enable latch (WEL) bit is reset under the following conditions:
■
■
■
■
■
■
■
■
■
■
Power-up
Write disable (WRDI) instruction completion
Write status register (WRSR) instruction completion
Write to lock register (WRLR) instruction completion
Page program (PP) instruction completion
Dual input fast program (DIFP) instruction completion
Program OTP (POTP) instruction completion
Subsector erase (SSE) instruction completion
Sector erase (SE) instruction completion
Bulk erase (BE) instruction completion
Figure 9.
Write disable (WRDI) instruction sequence
S
0
1
2
3
4
5
6
7
C
Instruction
DQ0
DQ1
High Impedance
AI13732
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NUMONYX [ NUMONYX B.V ]
